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54321DStorm UMA Schematics Document Chief River Intel PCHDCC8G:FOR 8G DIMMBBSTORMAWistron Corporation21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. TitleACover PageSize A3 Date: Document Number RevStorm Monday, June 25, 2012-1Sheet 1 of 1021543254321SYSTEM DC/DCCPU DC/DCNCP6131S52MNRINPUTSDCBATOUTProject code : 91.4WE01.001 PCB P/N : 48.4WE05.0SA Revision : 12223-1DStorm Block DiagramIntel CPUIVY Bridge 2C BGA 1023 Pin ULVDDRIII
Channel AAPL5916KAIINPUTS1D05V_PWR 0D85V_S04842~43OUTPUTSOUTPUTSVCC_CORESYSTEM DC/DCUP6128PQDDINPUTS DDR3L 1333 Memory Down 1 14 DDR3L 1333 Memory Down2DCBATOUT45OUTPUTS1D05V_VTTDSYSTEM DC/DCUP6183PQAG4113' LCD49eDPDDRIII
Channel BINPUTS15OUTPUTS5V_AUX_S5 3D3V_AUX_S5 5V_S5 3D3V_S5DCBATOUT4,5,6,7,8,9,10,11,12,13SYSTEM DC/DCUP6165BQKFINPUTSDCBATOUT46OUTPUTS1D5V_S3 0D75V_S0 DDR_VREF_S3FDICDMIx4SYSTEM DC/DCNCP5911MNTBGINPUTSDCBATOUT44COUTPUTSVCC_GFXCORE_PWRPCI-E X1LGA WLAN+BT MD22265VGART8208BGQWINPUTSDCBATOUT92Micro HDMI51HDMIIntelUSB 2.0OUTPUTSVGA_COREPCH HM776 USB 2.0/1.1 ports USB 2.0 2 USB 3.0 ports ETHERNET (10/100/1000Mb) High Definition Audio SATA ports (4) PCIE ports (4) PCI-E2.0 X4 Display Port Cactus-Ridge75~79TI CHARGERBQ24745RHDRINPUTSDCBATOUT2640OUTPUTSBT+Micro SDCardReader RTS513832SYSTEM DC/DCRT902547INPUTS3D3V_S0OUTPUTS1D8V_S0BUSB 3.0 Port *2BUSB 3.0 62LPC I/F ACPI 1.1SATA3 x2mSATA56 26SYSTEM DC/DCRT9025-25PSPINPUTS1D5V_S34993OUTPUTS1V_VGA_S0 1D8V_VGA_S017,18,19,20,21,22,23,24,25,26USB 2.0Touch Screen3D3V_S5AZALIASwitchesINPUTS SPI LPC Bus1D5V_S3 3D3V_S0OUTPUTS1D5V_VGA_S0 3D3V_VGA_S0Internal Digital MICCombo jackAzalia CODECALC27129Flash ROM 2MB 60 Flash ROM 4MB 60 SPISMBus SMBusLPC debug port71PCB LAYERL1:Top L2:VCC L3:Signal L4:VCC L5:SignalSTORMKBC ITE IT8518VG27Fan 28SMBusL6:Signal L7:GND L8:Signal L9:GND L10:BottomAAWistron Corporation21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.2CH SPEAKERKeyboard backlightMAX14521E2569Light Sensor49Touch Pad693Int. KB69ThermalNCT 77182528TitleBlock DiagramSize A3 Date:2Document Number Monday, June 25, 2012RevStormSheet1-12 of 10254PCH StrappingNameSPKRABHuron River Schematic Checklist Rev.0_7 Schematics NotesProcessor StrappingPin Name Strap DescriptionCFG[2] PCI-Express Static Lane Reversal 1: 0:CDHuron River Schematic Checklist Rev.0_7Default ValueEReboot option at power-up Default Mode: Internal weak Pull-down. No Reboot Mode with TCO Disabled: Connect to Vcc3_3 with 8.2-k - 10-k weak pull-up resistor. Weak internal pull-up. Leave as &No Connect&. GNT[3:0]# functionality is not available on Mobile. Mobile: Used as GPIO only Pull-up resistors are not required on these signals. If pull-ups are used, they should be tied to the Vcc3_3power rail. Enable Danbury: Connect to Vcc3_3 with 8.2-k? weak pull-up resistor.Configuration (Default value for each bit is 1 unless specified otherwise)Normal Operation. Lane Numbers Reversed15 -& 0, 14 -& 1, ...1INIT3_3V#4GNT3#/GPIO55 GNT2#/GPIO53 GNT1#/GPIO51CFG[4]Disabled - No Physical Display Port attached to 1: Embedded DisplayPort. Enabled - An external Display Port device is 0: connectd to the EMBEDDED display Port PCI-Express Port Bifurcation Straps 11 : x16 - Device 1 functions 1 and 2 disabled 10 : x8, x8 - Device 1 function 1 function 2 disabled 01 : Reserved - (Device 1 function 1 function 2 enabled) 00 : x8, x4, x4 - Device 1 functions 1 and 2 enabled04CFG[6:5] SPI_MOSI Left floating, no pull-down required. Disable Danbury:11NV_ALEEnable Danbury: Connect to +NVRAM_VCCQ with 8.2-kohm weak pull-up resistor [CRB has it pulled up with 1-kohm no-stuff resistor] Leave floating (internal pull-down) Disable Danbury:CFG[7]PEG DEFER TRAINING1: PEG Train immediately following xxRESETB de assertion 1 0: PEG Wait for BIOS for trainingNC_CLEDMI termination voltage. Weak internal pull-up. Do not pull low. Low (0) - Flash Descriptor Security will be overridden. Also, when this signals is sampled on the rising edge of PWROK then it will also disable Intel ME and its features. High (1) - Security measure defined in the Flash Descriptor will be enabled. Platform design should provide appropriate pull-up or pull-down depending on the desired settings. If a jumper option is used to tie this signal to GND as required by the functional strap, the signal should be pulled low through a weak pull-down in order to avoid asserting HDA_DOCK_EN# inadvertently. Note: CRB recommends 1-kohm pull-down for FD Override. There is an internal pull-up of 20 kohm for DA_DOCK_EN# which is only enabled at boot/reset for strapping functions. Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#. Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#. Low (1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with no confidentiality High (1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with confidentiality Note : This is an un-muxed signal. This signal has a weak internal pull-down of 20 kohm which is enabled when PWROK is low. Sampled at rising edge of RSMRST#. CRB has a 1-kohm pull-up on this signal to +3.3VA rail. GPIO8 on PCH is the Integrated Clock Enable strap and is required to be pulled-down using a 1k +/- 5% resistor. When this signal is sampled high at the rising edge of RSMRST#, Integrated Clocking is enabled, When sampled low, Buffer Through Mode is enabled. Default = Do not connect (floating) High(1) = Enables the internal VccVRM to have a clean supply for analog rails. No need to use on-board filter circuit. Low (0) = Disables the VccVRM. Need to use on-board filter circuits for analog rails.5V_USBX_S3 1D5V_S3 DDR_VREF_S3 5V 1.5V 0.75V S3Voltage RailsPOWER PLANE 5V_S0 3D3V_S0 1D8V_S0 1D5V_S0 1D05V_VTT 0D85V_S0 0D75V_S0 VCC_CORE VCC_GFXCORE 1D8V_VGA_S0 3D3V_VGA_S0 1V_VGA_S0 VOLTAGE ACTIVE IN 5V 3.3V 1.8V 1.5V 1.05V 0.95 - 0.85V 0.75V 0.35V to 1.5V 0.4 to 1.25V 1.8V 3.3V 1V DESCRIPTION3HAD_DOCK_EN# /GPIO[33]3S0 CPU Core Rail Graphics Core RailHDA_SDO HDA_SYNC GPIO15BT+ DCBATOUT 5V_S5 5V_AUX_S5 3D3V_S5 3D3V_AUX_S5 3D3V_LAN_S56V-14.1V 6V-14.1V 5V 5V 3.3V 3.3V 3.3VAC Brick Mode only All S statesGPIO8WOL_ENLegacy WOL2GPIO273D3V_AUX_KBC3.3VDSW, SxON for supporting Deep Sleep states23D3V_AUX_S53.3VG3, SxPowered by Li Coin Cell in G3 and +V3ALW in SxUSB Table PCIE Routing0SMBus ADDRESSESI 2 C / SMBus AddressesDevice Ref Des HURON RIVER ORB Address Hex BusLANE1 LANE2 LANE31N/A N/A N/A WLAN Thunderbolt Thunderbolt Thunderbolt ThunderboltPair 0 1 2 3 4 51 2SATA TableSATA Device mSATA1 mSATA2 N/A N/A N/A N/A3 4 5 6 7 8 9 10 11 12EC SMBus 1 Battery CHARGER EC SMBus 2 PCH eDPBAT_SCL/BAT_SDA BAT_SCL/BAT_SDA BAT_SCL/BAT_SDALANE4 LANE5 LANE6 LANE7 LANE8SML1_CLK/SML1_DATA SML1_CLK/SML1_DATA SML1_CLK/SML1_DATASTORM1PCH SMBus SO-DIMMA (SPD) SO-DIMMB (SPD) Digital Pot G-Sensor MINIPCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK Title PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK Size A3 Date:Wistron Corporation21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.Table of ContentDocument Number Monday, June 25, 2012 RevStormSheet 3 of-1102543211D05V_VTT CPU1A 1 OF 9 R401 PEG_IRCOMP_RD19DMI_TXN[3:0]DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3 DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3M2 P6 P1 P10 N3 P7 P3 P11 K1 M8 N4 R2 K3 M7 P4 T319DMI_TXP[3:0]DMI_RX#0 DMI_RX#1 DMI_RX#2 DMI_RX#3 DMI_RX0 DMI_RX1 DMI_RX2 DMI_RX3 DMI_TX#0 DMI_TX#1 DMI_TX#2 DMI_TX#3 DMI_TX0 DMI_TX1 DMI_TX2 DMI_TX3PEG_ICOMPI PEG_ICOMPO PEG_RCOMPO PEG_RX#0 PEG_RX#1 PEG_RX#2 PEG_RX#3 PEG_RX#4 PEG_RX#5 PEG_RX#6 PEG_RX#7 PEG_RX#8 PEG_RX#9 PEG_RX#10 PEG_RX#11 PEG_RX#12 PEG_RX#13 PEG_RX#14 PEG_RX#15 PEG_RX0 PEG_RX1 PEG_RX2 PEG_RX3 PEG_RX4 PEG_RX5 PEG_RX6 PEG_RX7 PEG_RX8 PEG_RX9 PEG_RX10 PEG_RX11 PEG_RX12 PEG_RX13 PEG_RX14 PEG_RX15 PEG_TX#0 PEG_TX#1 PEG_TX#2 PEG_TX#3 PEG_TX#4 PEG_TX#5 PEG_TX#6 PEG_TX#7 PEG_TX#8 PEG_TX#9 PEG_TX#10 PEG_TX#11 PEG_TX#12 PEG_TX#13 PEG_TX#14 PEG_TX#15 PEG_TX0 PEG_TX1 PEG_TX2 PEG_TX3 PEG_TX4 PEG_TX5 PEG_TX6 PEG_TX7 PEG_TX8 PEG_TX9 PEG_TX10 PEG_TX11 PEG_TX12 PEG_TX13 PEG_TX14 PEG_TX15G3 G1 G4 H22 J21 B22 D21 A19 D17 B14 D13 A11 B10 G8 A8 B6 H8 E5 K7 K22 K19 C21 D19 C19 D16 C13 D12 C11 C9 F8 C8 C5 H6 F6 K6 G22 C23 D23 F21 H19 C17 K15 F17 F14 A15 J14 H13 M10 F10 D9 J4 F22 A23 D24 E21 G19 B18 K17 G17 E14 C15 K13 G13 K10 G10 D8 K41224D9R1F-GPDDMI DMI19 DMI_RXN[3:0]19DMI_RXP[3:0]19 FDI_TXN[7:0]19FDI_TXP[7:0]FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7U6 W10 W3 AA7 W7 T4 AA3 AC8 AA11 AC12 U11 AA10 AG8FDI0_TX0 FDI0_TX1 FDI0_TX2 FDI0_TX3 FDI1_TX0 FDI1_TX1 FDI1_TX2 FDI1_TX3 FDI0_FSYNC FDI1_FSYNC FDI_INT FDI0_LSYNC FDI1_LSYNC19 19 19 19 19FDI_FSYNC0 FDI_FSYNC1 FDI_INT FDI_LSYNC0 FDI_LSYNC11D05V_VTT24D9R1F-GP R402 1 2 49 CPU_EDP_HPD#DP_COMPAF3 AD2 AG11 AG4 AF4 AC3 AC4 AE11 AE7 AC1 AA4 AE10 AE6EDP_COMPIO EDP_ICOMPO EDP_HPD# EDP_AUX# EDP_AUXBImpedance:85 ohmSignal Routing Guideline: EDP_ICOMPO keep W/S=12/15 mils and routing length less than 500 mils. EDP_COMPIO keep W/S=4/15 mils and routing length less than 500 mils.PCI EXPRESS -- GRAPHICSCFDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7U7 W11 W1 AA6 W6 V4 Y2 AC9FDI0_TX#0 FDI0_TX#1 FDI0_TX#2 FDI0_TX#3 FDI1_TX#0 FDI1_TX#1 FDI1_TX#2 FDI1_TX#3CIntel(R) FDI49 CPU_EDP_AUX# 49 CPU_EDP_AUX 49 CPU_EDP_DATA0# 49 CPU_EDP_DATA1#BeDP eDPEDP_TX#0 EDP_TX#1 EDP_TX#2 EDP_TX#3 EDP_TX0 EDP_TX1 EDP_TX2 EDP_TX3IVY-BRIDGE-GP-NF49 CPU_EDP_DATA0 49 CPU_EDP_DATA171.00IVY.A0U1D05V_VTT1R404 1KR1J-GP2CPU_EDP_HPD# STORMAAWistron Corporation21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date: Document Number Monday, June 25, 2012 Sheet 4 of Rev 10254CPU1B32 OF 92BCLK BCLK# J3 H2 AG3 AG1CLK_EXP_P CLK_EXP_N 20 201D05V_VTT R50122 H_SNB_IVB#F49 C57PROC_SELECT# PROC_DETECT#CLOCKS1 Disabling Guidelines: If motherboard only supports external graphics or without eDP: Connect DPLL_REF_SSCLK on Processor to GND through 1K +/- 5% resistor. Connect DPLL_REF_SSCLK# on Processor to VCCP through 1K +/- 5% resistorpower (~15 mW) may be wasted.MISC MISC1262R1J-GPH_PROCHOT#DPLL_REF_CLK DPLL_REF_CLK#CLK_DP_P 20 CLK_DP_N 201D2C501 SC47P50V2JN-3GPC49DSM_DRAMRST# 37 CLK_EXP_P CLK_EXP_N CLK_DP_PCATERR#1 1 1 1TP501 TP502 TP503 TP504-SDTHERMAL22,27H_PECI R504A48PECISM_DRAMRST# SM_RCOMP0 SM_RCOMP1 SM_RCOMP2AT30 BF44 BE43 BG432 R502 1 4K99R2F-L-GPSM_RCOMP_0 R506 1 SM_RCOMP_1 R507 1 SM_RCOMP_2 R508 127 H_PROCHOT#1256R1J-GPH_PROCHOT#_RDDR3 MISCC45PROCHOT#2 140R2F-GP 2 25D5R2F-GP 2 200R1F-GPCLK_DP_NFor SIV,please near to CPUN53 N55 L56 L55 J58 M60 L5922,36 H_THERMTRIP#D45THERMTRIP# PRDY# PREQ# TCK TMS TRST#PWR MANAGEMENT PWR MANAGEMENTXDP_TRST# XDP_TDO XDP_TDO XDP_TRST#1D05V_VTT19H_PM_SYNCC48JTAG & BPMPM_SYNCTDI TDO2 13 4RN502 SRN51J-GP22,97 H_CPUPW RGDB46R503UNCOREPWRGOODC37 VDDPW RGOOD21 10KR2J-L-GP BE45 SM_DRAMPWROKDBR# BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7K58 G58 E55 E59 G55 G59 H60 J59 J61XDP_DBRESET#CBUF_CPU_RST#D44RESET#IVY-BRIDGE-GP-NF3D3V_S0 RN505 XDP_DBRESET# 18,27,36,65,71,75,81,97 PLT_RST#1 24 3BUF_CPU_RST#SRN1KJ-11-GP-U1R505 499R2F-2-GPB2BASTORMAWistron Corporation21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date: Document Number Monday, June 25, 2012 Sheet 5 of Rev 10254321CPU1C 15 M_A_DQ[63:0]D3 OF 9 CPU1D 4 OF 9CBM_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63AG6 AJ6 AP11 AL6 AJ10 AJ8 AL8 AL7 AR11 AP6 AU6 AV9 AR6 AP8 AT13 AU13 BC7 BB7 BA13 BB11 BA7 BA9 BB9 AY13 AV14 AR14 AY17 AR19 BA14 AU14 BB14 BB17 BA45 AR43 AW48 BC48 BC45 AR45 AT48 AY48 BA49 AV49 BB51 AY53 BB49 AU49 BA53 BB55 BA55 AV56 AP50 AP53 AV54 AT54 AP56 AP52 AN57 AN53 AG56 AG53 AN55 AN52 AG55 AK56SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63SA_CK0 SA_CK#0 SA_CKE0AU36 AV36 AY2614 M_B_DQ[63:0] M_A_DIM0_CLK_DDR0 15 M_A_DIM0_CLK_DDR#0 15 M_A_DIM0_CKE0 15SA_CK1 SA_CK#1 SA_CKE1AT40 AU40 BB26SA_CS#0 SA_CS#1BB40 BC41M_A_DIM0_CS#0 15SA_ODT0 SA_ODT1AY40 BA41M_A_DIM0_ODT0 15DDR SYSTEM MEMORY ASA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7AJ11 AR10 AY11 AU17 AW45 AV51 AT56 AK54M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7M_A_DQS[7:0] 15DDR SYSTEM MEMORY BSA_DQS#0 SA_DQS#1 SA_DQS#2 SA_DQS#3 SA_DQS#4 SA_DQS#5 SA_DQS#6 SA_DQS#7AL11 AR8 AV11 AT17 AV45 AY51 AT55 AK55M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7M_A_DQS#[7:0] 1515 15 15M_A_BS0 M_A_BS1 M_A_BS2BD37 BF36 BA28SA_BS0 SA_BS1 SA_BS215 15 15M_A_CAS# M_A_RAS# M_A_W E#BE39 BD39 AT41SA_CAS# SA_RAS# SA_WE#SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8 SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15BG35 BB34 BE35 BD35 AT34 AU34 BB32 AT32 AY32 AV32 BE37 BA30 BC30 AW41 AY28 AU26M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15M_A_A[15:0]15M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63AL4 AL1 AN3 AR4 AK4 AK3 AN4 AR1 AU4 AT2 AV4 BA4 AU3 AR3 AY2 BA3 BE9 BD9 BD13 BF12 BF8 BD10 BD14 BE13 BF16 BE17 BE18 BE21 BE14 BG14 BG18 BF19 BD50 BF48 BD53 BF52 BD49 BE49 BD54 BE53 BF56 BE57 BC59 AY60 BE54 BG54 BA58 AW59 AW58 AU58 AN61 AN59 AU59 AU61 AN58 AR58 AK58 AL58 AG58 AG59 AM60 AL59 AF61 AH60SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63DSB_CK0 SB_CK#0 SB_CKE0BA34 AY34 AR22M_B_DIM0_CLK_DDR0 14 M_B_DIM0_CLK_DDR#0 14 M_B_DIM0_CKE0 14SB_CK1 SB_CK#1 SB_CKE1BA36 BB36 BF27SB_CS#0 SB_CS#1BE41 BE47M_B_DIM0_CS#0 14SB_ODT0 SB_ODT1AT43 BG47M_B_DIM0_ODT0 14CSB_DQS#0 SB_DQS#1 SB_DQS#2 SB_DQS#3 SB_DQS#4 SB_DQS#5 SB_DQS#6 SB_DQS#7AL3 AV3 BG11 BD17 BG51 BA59 AT60 AK59M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7M_B_DQS#[7:0] 14SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7AM2 AV1 BE11 BD18 BE51 BA61 AR59 AK61M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7M_B_DQS[7:0] 14B14 14 14M_B_BS0 M_B_BS1 M_B_BS2BG39 BD42 AT22SB_BS0 SB_BS1 SB_BS214 14 14M_B_CAS# M_B_RAS# M_B_W E#AV43 BF40 BD45SB_CAS# SB_RAS# SB_WE#SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8 SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15BF32 BE33 BD33 AU30 BD30 AV30 BG30 BD29 BE30 BE28 BD43 AT28 AV28 BD46 AT26 AU22M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15M_B_A[15:0] 14IVY-BRIDGE-GP-NF IVY-BRIDGE-GP-NFSTORMA AWistron Corporation21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date:5 4 3 2Document Number Monday, June 25, 2012 Sheet1Rev 6 of 10254321DDCPU1E5 OF 9CFG4R702 1KR1J-GPB50 C51 B54 D53 A51 C53 C55 H49 A55 H51 K49 K53 F53 G53 L51 F51 D52 L53 H43 K43 H45 K45 F48 G48 H48 K48 BA19 AV19 AT21 BB21 BB19 AY21 BA22 AY22 AU19 AU21 BD21 BD22 BD25 BD26 BG22 BE22 BG26 BE26 BF23 BE24CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 VCC_VAL_SENSE VSS_VAL_SENSE VAXG_VAL_SENSE VSSAXG_VAL_SENSE VCC_DIE_SENSE RSVD47 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27BCLK_ITP BCLK_ITP# RSVD30 RSVD31 RSVD32 RSVD33 RSVD34 RSVD35 RSVD36 RSVD37 RSVD38 RSVD39 RSVD40N59 N58 N42 L42 L45 L47 M13 M14 U14 W14 P13 AT49 K24 AH2 AG13 AM14 AM15 N50CFG[0]Connect a series 1 kOhms resistor on the critical CFG[0 trace in a manner which does not introduce any stubs to CFG[0] trace. Route as needed from the opposite side of this series isolation resistor to the debug port. ITP will drive the net to GND.21CRESERVEDRSVD41 RSVD42 RSVD43 RSVD44 RSVD45CFG[2]PCIe Static x16 Lane Numbering Reversal.1: Normal O Lane # definition matches socket pin map definition 0:Lane Reversed 1:Disabled - No Physical Display Port attached to Embedded DisplayPort No connect for disable0CCFG[4]DC_TEST_A4 DC_TEST_C4 DC_TEST_D3 DC_TEST_D1 DC_TEST_A58 DC_TEST_A59 DC_TEST_C59 DC_TEST_A61 DC_TEST_C61 DC_TEST_D61 DC_TEST_BD61 DC_TEST_BE61 DC_TEST_BE59 DC_TEST_BG61 DC_TEST_BG59 DC_TEST_BG58 DC_TEST_BG4 DC_TEST_BG3 DC_TEST_BE3 DC_TEST_BG1 DC_TEST_BE1 DC_TEST_BD1DC_TEST_A4 A4 1 C4 DC_TEST_C4 D3 DC_TEST_D1 D1 1 DC_TEST_A58 A58 1 A59 DC_TEST_A59 C59 A61 DC_TEST_A61 C61 DC_TEST_D61 1 D61 DC_TEST_BD611 BD61 BE61 DC_TEST_BE61 BE59 DC_TEST_BG61 BG61 BG59 DC_TEST_BG58 BG58 1 DC_TEST_BG4 1 BG4 BG3 DC_TEST_BG3 BE3 BG1 DC_TEST_BG1 BE1 DC_TEST_BD1 1 BD1 TP701 Do Not Stuff TP702 Do Not Stuff TP703 Do Not StuffDisplay Port Presence strap0:Enabled - An external Display Port device is connected to the Embedded Display Port Pull-down to GND through a 1K resistor to enable port ± 5%0CFG[6:5]TP704 Do Not Stuff TP705 Do Not StuffPCI-Express Port Bifurcation Straps00 01 10 11= = = =1 x 8, 2 x 4 PCI Express reserved 2 x 8 PCI Express 1 x 16 PCI Express00BTP706 Do Not Stuff TP707 Do Not StuffCFG[17:7]TP708 Do Not StuffReserved configuration lands. A test point may be placed on the board for these lands.BIVY-BRIDGE-GP-NF71.00IVY.A0UASTORMAWistron Corporation21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date:5 4 3 2Document Number Monday, June 25, 2012 Sheet1Rev 7 of 10254321CPU1FPOWER6 OF 9VCC_COREDYDYDC811 SC2D2U6D3V2MX-GPC813 SC2D2U6D3V2MX-GPC834 SC2D2U6D3V2MX-GP6 2D2U to 3 4D7ULayout Note: 2.2u Cap place under CPUDY C844Do Not Stuff 1 1CC843 SC10U6D3V2MX-GP-U SC10U6D3V2MX-GP-U 1C835 SC10U6D3V2MX-GP-U 1C833 SC10U6D3V2MX-GP-U SC10U6D3V2MX-GP-UC832 DY Do Not Stuff 1 1C818 SC10U6D3V2MX-GP-UC816 DY C812 DY Do Not Stuff Do Not Stuff 1 1QUIET RAILS11A26 A29 A31 A34 A35 A38 A39 A42 C26 C27 C32 C34 C37 C39 C42 D27 D32 D34 D37 D39 D42 E26 E28 E32 E34 E37 E38 F25 F26 F28 F32 F34 F37 F38 F42 G42 H25 H26 H28 H29 H32 H34 H35 H37 H38 H40 J25 J26 J28 J29 J32 J34 J35 J37 J38 J40 J42 K26 K27 K29 K32 K34 K35 K37 K39 K42 L25 L28 L33 L36 L40 N26 N30 N34 N38VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76CORE SUPPLYPEG IO AND DDR IOVCCIO1 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8 VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24 VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29AF46 AG48 AG50 AG51 AJ17 AJ21 AJ25 AJ43 AJ47 AK50 AK51 AL14 AL15 AL16 AL20 AL22 AL26 AL45 AL48 AM16 AM17 AM21 AM43 AM47 AN20 AN42 AN45 AN481D05V_VTTSC2D2U6D3V2MX-GP 2 1C802 SC2D2U6D3V2MX-GP 2 1C803 SC2D2U6D3V2MX-GP 2 1C804 SC2D2U6D3V2MX-GP 2 1C805 SC2D2U6D3V2MX-GP 2 1C806 SC2D2U6D3V2MX-GP 2 1C807 SC2D2U6D3V2MX-GP 2 1C808 SC2D2U6D3V2MX-GP 2 1C801 Do Not Stuff 2 1C809 Do Not Stuff 2 1C810change 0603 to 0402SC10U6D3V2MX-GP-U C822SC10U6D3V2MX-GP-U C821SC10U6D3V2MX-GP-U C820SC10U6D3V2MX-GP-U C819SC10U6D3V2MX-GP-U SC10U6D3V2MX-GP-U C817SC10U6D3V2MX-GP-U C815SC10U6D3V2MX-GP-U C814 C81411111122222221DSC2D2U6D3V2MX-GP 2 1111222C8361D05V_VTTVCCIO30 VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39 VCCIO40 VCCIO41 VCCIO42 VCCIO43 VCCIO44 VCCIO45 VCCIO46 VCCIO47 VCCIO48 VCCIO49AA14 AA15 AB17 AB20 AC13 AD16 AD18 AD21 AE14 AE15 AF16 AF18 AF20 AG15 AG16 AG17 AG20 AG21 AJ14 AJ15C823 SC1U10V2KX-1GPC824 SC1U10V2KX-1GPC825 SC1U10V2KX-1GPC826 SC1U10V2KX-1GPC827 SC1U10V2KX-1GPC828 SC1U10V2KX-1GPC829 SC1U10V2KX-1GPC830 SC1U10V2KX-1GPC837 SC1U10V2KX-1GPC838 SC1U10V2KX-1GPC839 SC1U10V2KX-1GPC840 SC1U10V2KX-1GPC841 SC1U10V2KX-1GPC842 SC1U10V2KX-1GPC845 SC1U10V2KX-1GP2222222211111122222221C847 SC1U10V2KX-1GP111111112222222221CVCCIO50 VCCIO51W16 W17VCCIO_SELBC22H_VCCP_SEL_L1TP801 Do Not StuffR806 VCCPQE1 VCCPQE2 AM25 AN22 +V1.05S_VCCPQE 1 1 2 Do Not Stuff1D05V_VTT 1D05V_VTT 1D05V_VTTC831 SC1U6D3V2KX-L-1-GPR804 130R2F-1-GP R803 43R1J-GP 1 2 2 2R808 75R2J-1-GPSVIDVIDALERT# VIDSCLK VIDSOUTA44 B43 C44H_CPU_SVIDALRT# H_CPU_SVIDCLK H_CPU_SVIDDAT2VR_SVID_ALERT# 42 H_CPU_SVIDCLK 42 H_CPU_SVIDDAT 42B1 R801 2 100R1F-GPVCC_COREBSENSE LINESVCC_SENSE VSS_SENSEF43 G43 1VCCSENSE VSSSENSE42 42VCCIO_SENSE VSS_SENSE_VCCIOAN16 AN17VCCIO_SENSE 45 VSSIO_SENSE 45 2R802 100R1F-GPIVY-BRIDGE-GP-NFAASTORMWistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A2 Date:5 4 3 2Document Number Monday, June 25, 20121Rev Sheet 8 of 10254321CPU1GPOWERVREF7 OF 9VCC_GFXCORE4 3D- 1.5V RAILSDY2DYCDY C944DY C943Do Not Stuff Do Not StuffC930 SC10U6D3V2MX-GP-UC945 SC10U6D3V2MX-GP-UVCC_GFXCOREAA46 AB47 AB50 AB51 AB52 AB53 AB55 AB56 AB58 AB59 AC61 AD47 AD48 AD50 AD51 AD52 AD53 AD55 AD56 AD58 AD59 AE46 N45 P47 P48 P50 P51 P52 P53 P55 P56 P61 T48 T58 T59 T61 U46 V47 V48 V50 V51 V52 V53 V55 V56 V58 V59 W50 W51 W52 W53 W55 W56 W61 Y48 Y61SM_VREF VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 VAXG37 VAXG38 VAXG39 VAXG40 VAXG41 VAXG42 VAXG43 VAXG44 VAXG45 VAXG46 VAXG47 VAXG48 VAXG49 VAXG50 VAXG51 VAXG52 VAXG53 VAXG54 VAXG55 VAXG56 SA_DIMM_VREFDQ SB_DIMM_VREFDQAY43 BE7 BG7+V_SM_VREF_CNT M_VREF_DQ_DIMM0_C M_VREF_DQ_DIMM1_C+V_SM_VREF_CNT 37 M_VREF_DQ_DIMM0_C M_VREF_DQ_DIMM1_C 37 37DRN901 Do Not StuffDY1 2 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8 VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18 VDDQ19 VDDQ20 VDDQ21 VDDQ22 VDDQ23 VDDQ24 VDDQ25 VDDQ26 AJ28 AJ33 AJ36 AJ40 AL30 AL34 AL38 AL42 AM33 AM36 AM40 AN30 AN34 AN38 AR26 AR28 AR30 AR32 AR34 AR36 AR40 AV41 AW26 BA40 BB28 BG33C902 SC1U10V2KX-1GP 2 1C904 SC1U10V2KX-1GP 2 1C905 SC1U10V2KX-1GP 2 1C906 SC1U10V2KX-1GP 2 1C907 SC1U10V2KX-1GPC901 Do Not Stuff 2 1C903 Do Not Stuff 2 111D35V_S0SC10U6D3V2MX-GP-U C912 C912SC10U6D3V2MX-GP-U C911SC10U6D3V2MX-GP-U SC10U6D3V2MX-GP-U C910SC10U6D3V2MX-GP-U C909 C909SC10U6D3V2MX-GP-U C928 C928SC10U6D3V2MX-GP-U C927SC10U6D3V2MX-GP-U SC10U6D3V2MX-GP-U C929111111C908 SC1U10V2KX-1GP 2 1C920 SC1U10V2KX-1GP 2 1C921 SC1U10V2KX-1GP 2 1C922 SC1U10V2KX-1GP 2 1C926 SC1U10V2KX-1GP2222221GRAPHICSDDR32211D35V_S0CC931 SC1U10V2KX-1GPC932 SC1U10V2KX-1GPC933 SC1U10V2KX-1GPC934 SC1U10V2KX-1GP 2 1C935 SC1U10V2KX-1GP 2 1C936 SC1U10V2KX-1GP 2 1C937 SC1U10V2KX-1GP 2 1C938 SC1U10V2KX-1GPC939 SC1U10V2KX-1GPHere Del Pull up R12QUIET RAILSSENSE LINESB42 VCC_AXG_SENSE 42 VSS_AXG_SENSEVCC_AXG_SENSE VSS_AXG_SENSE R902 100R1F-GPF45 G45VAXG_SENSE VSSAXG_SENSEVCCDQ1 VCCDQ2AM28 AN262+1.5S_VCCD_Q1 2 Do Not Stuff 1 2 C919 SC1U6D3V2KX-L-1-GP 1R904 1KR1F-GP2R901 100R1F-GP1D35V_S0 R907VCCSA_VID0 VCCSA_VID1 R906 1KR1F-GPC940 SC1U10V2KX-1GP11111222222222111121VCCSA_VID0 VCCSA_VID148 48B11D8V_S011BB3 BC1 BC4SC1U10V2KX-1GPVCCPLL1 VCCPLL2 VCCPLL31.8V RAIL21SC10U6D3V2MX-GP-U C913C914SENSE LINESVDDQ_SENSE VSS_SENSE_VDDQBC43 TP_VDDQ_SENSE BA43 TP_VDDQ_VSS1 1TP901 Do Not Stuff TP902 Do Not StuffVID0 LVID1 L H L HVCCSA ULV 0.9V 0.85V 0.775V 0.75V22SA RAIL0D85V_S0SC1U10V2KX-1GP 2 1SC1U10V2KX-1GPSC1U10V2KX-1GPSC1U10V2KX-1GPVCCSA VID linesAL17 L21 N16 N20 N22 P17 P20 R16 R18 R21 U15 V16 V17 V18 V21 W20VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8 VCCSA9 VCCSA10 VCCSA11 VCCSA12 VCCSA13 VCCSA14 VCCSA15 VCCSA16Pull up page 48 RL HVCCSA_SENSEU10VCCSA_SENSE 48SC10U6D3V2MX-GP-U C918SC10U6D3V2MX-GP-U C9171111222221HD48 D49VCCSA_VID0 VCCSA_VID1C942C941C916C915 C915VCCSA_VID0 VCCSA_VID1STORMAWistron Corporation21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date: Document Number Monday, June 25, 2012 Sheet1IVY-BRIDGE-GP-NFRev 9 of 102543254321CPU1H8 OF 9 9 OF 9CPU1IDCBA13 A17 A21 A25 A28 A33 A37 A40 A45 A49 A53 A9 AA1 AA13 AA50 AA51 AA52 AA53 AA55 AA56 AA8 AB16 AB18 AB21 AB48 AB61 AC10 AC14 AC46 AC6 AD17 AD20 AD4 AD61 AE13 AE8 AF1 AF17 AF21 AF47 AF48 AF50 AF51 AF52 AF53 AF55 AF56 AF58 AF59 AG10 AG14 AG18 AG47 AG52 AG61 AG7 AH4 AH58 AJ13 AJ16 AJ20 AJ22 AJ26 AJ30 AJ34 AJ38 AJ42 AJ45 AJ48 AJ7 AK1 AK52 AL10 AL13 AL17 AL21 AL25 AL28 AL33 AL36 AL40 AL43 AL47 AL61 AM13 AM20 AM22 AM26 AM30 AM34VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90VSSVSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180AM38 AM4 AM42 AM45 AM48 AM58 AN1 AN21 AN25 AN28 AN33 AN36 AN40 AN43 AN47 AN50 AN54 AP10 AP51 AP55 AP7 AR13 AR17 AR21 AR41 AR48 AR61 AR7 AT14 AT19 AT36 AT4 AT45 AT52 AT58 AU1 AU11 AU28 AU32 AU51 AU7 AV17 AV21 AV22 AV34 AV40 AV48 AV55 AW13 AW43 AW61 AW7 AY14 AY19 AY30 AY36 AY4 AY41 AY45 AY49 AY55 AY58 AY9 BA1 BA11 BA17 BA21 BA26 BA32 BA48 BA51 BB53 BC13 BC5 BC57 BD12 BD16 BD19 BD23 BD27 BD32 BD36 BD40 BD44 BD48 BD52 BD56 BD8 BE5 BG13NCTFBG17 BG21 BG24 BG28 BG37 BG41 BG45 BG49 BG53 BG9 C29 C35 C40 D10 D14 D18 D22 D26 D29 D35 D4 D40 D43 D46 D50 D54 D58 D6 E25 E29 E3 E35 E40 F13 F15 F19 F29 F35 F40 F55 G51 G6 G61 H10 H14 H17 H21 H4 H53 H58 J1 J49 J55 K11 K21 K51 K8 L16 L20 L22 L26 L30 L34 L38 L43 L48 L61 M11 M15VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249VSSVSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285 VSS286 VSS287 VSS288 VSS289 VSS290 VSS291 VSS292 VSS293 VSS294 VSS295 VSS296 VSS297 VSS298 VSS299 VSS300M4 M58 M6 N1 N17 N21 N25 N28 N33 N36 N40 N43 N47 N48 N51 N52 N56 N61 P14 P16 P18 P21 P58 P59 P9 R17 R20 R4 R46 T1 T47 T50 T51 T52 T53 T55 T56 U13 U8 V20 V61 W13 W15 W18 W21 W46 W8 Y4 Y47 Y58 Y59DCNCTF TEST PIN A5,A57,BC61,BG5 BG57,C3,E1,E61VSS_NCTF_1#A5 VSS_NCTF_2#A57 VSS_NCTF_3#BC61 VSS_NCTF_8#BG5 VSS_NCTF_9#BG57 VSS_NCTF_10#C3 VSS_NCTF_13#E1 VSS_NCTF_14#E61 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_11 VSS_NCTF_12A5 A57 BC61 BG5 BG57 C3 E1 E61 BD3 BD59 BE4 BE58 C58 D59BIVY-BRIDGE-GP-NFASTORM IVY-BRIDGE-GP-NFAWistron Corporation21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date: Document Number Monday, June 25, 2012 Sheet1Rev 10 of 102543254321DDreserveC CBBJE40 delete XDP functionSTORMAWistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. TitleAXDPSize A4 Date:5 4 3 2Document NumberRevStorm Monday, June 25, 2012-1Sheet 111of10254321DDCC(Blanking)BBSTORMAWistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. TitleAReservedSize A4 Date:5 4 3 2Document NumberRevStorm Monday, June 25, 2012-1Sheet 121of10254321DDCC(Blanking)BBSTORMAWistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. TitleAReservedSize A4 Date:5 4 3 2Document NumberRevStorm Monday, June 25, 2012-1Sheet 131of10254321SSID = MEMORY1D35V_S3 RAM1 M_B_A[15:0] 6 1D35V_S3 RAM2M_B_DQ[63:0]6 6M_B_DQS#[7:0]M_B_DQS[7:0]D6K8 K2 N1 R9 B2 D9 G7 R1 N9 A8 A1 C1 C9 D2 E9 F1 H9 H2VDD VDD VDD VDD VDD VDD VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VREFDQ VREFCA ZQ A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 BA0 BA1 BA2 CK CK# CKE UDM LDM WE# CAS# RAS#DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 UDQS UDQS# LDQS LDQS# ODT CS# RESET# NC#M7 NC#L9 NC#L1 NC#J9 NC#J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQE3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 C7 B7 F3 G3 K1 L2 T2 M7 L9 L1 J9 J1 J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 G1 F9 E8 E2 D8 D1 B9 B1 G9M_B_DQ13 M_B_DQ12 M_B_DQ9 M_B_DQ8 M_B_DQ11 M_B_DQ14 M_B_DQ10 M_B_DQ15 M_B_DQ7 M_B_DQ1 M_B_DQ3 M_B_DQ0 M_B_DQ2 M_B_DQ4 M_B_DQ6 M_B_DQ5 M_B_DQS0 M_B_DQS#0 M_B_DQS1 M_B_DQS#1 M_B_DIM0_ODT0 6L GROUPK8 K2 N1 R9 B2 D9 G7 R1 N9 A8 A1 C1 C9 D2 E9 F1 H9 H2M_VREF_DQ_DIMMB DDR_VREF_S3VDD VDD VDD VDD VDD VDD VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VREFDQ VREFCA ZQ A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 BA0 BA1 BA2 CK CK# CKE UDM LDM WE# CAS# RAS#DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 UDQS UDQS# LDQS LDQS# ODT CS# RESET# NC#M7 NC#L9 NC#L1 NC#J9 NC#J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQE3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 C7 B7 F3 G3 K1 L2 T2 M7 L9 L1 J9 J1 J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 G1 F9 E8 E2 D8 D1 B9 B1 G9M_B_DQ28 M_B_DQ26 M_B_DQ29 M_B_DQ30 M_B_DQ25 M_B_DQ27 M_B_DQ24 M_B_DQ31 SCD1U10V1KX-GP SCD1U10V1KX-GP C1412 M_B_DQ23 M_B_DQ16 M_B_DQ19 M_B_DQ17 M_B_DQ20 M_B_DQ22 M_B_DQ18 M_B_DQ21 M_B_DQS2 M_B_DQS#2 M_B_DQS3 M_B_DQS#3 M_B_DIM0_ODT0 6 M_B_DIM0_CS#0 6 DDR3_DRAMRST# 15,37 SCD1U10V1KX-GP C1457DDR_VREF_S3Place these caps close to VTT1 and VTT2.0D675V_S0 0D675V_S0SCD1U10V1KX-GP C1414SCD1U10V1KX-GP C1411SCD1U10V1KX-GP C14131111D2222U GROUPSCD1U10V1KX-GP C141911SCD1U10V1KX-GP C1450SCD1U10V1KX-GP C1220D675V_S021 R09 1 R13 1 R15 1 R17 1 R14182 2 2 2 2 2 2 2 2M_B_DIM0_CKE0 33R1F-GP M_B_DIM0_ODT0 33R1F-GP M_B_DIM0_CS#0 33R1F-GP M_B_RAS# 33R1F-GP M_B_CAS# 33R1F-GP M_B_WE# 33R1F-GP M_B_BS0 33R1F-GP M_B_BS1 33R1F-GP M_B_BS2 33R1F-GPU GROUPM_VREF_DQ_DIMMB DDR_VREF_S3VRAM_CH_B_ZQ_1 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14H1 M8 L8 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M2 N8 M3 J7 K7 K9 D3 E7 L3 K3 J3L GROUPVRAM_CH_B_ZQ_2 M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14H1 M8 L8 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M2 N8 M3 J7 K7 K9 D3 E7 L3 K3 J3M_VREF_DQ_DIMMB1RF-GPM_B_DIM0_CS#0 6 DDR3_DRAMRST# 15,37 M_B_A15 VRAM_CH_B_ZQ1_1RF-GP221111M_B_A15 VRAM_CH_B_ZQ1_22221R1444 Do Not Stuff1R1445 Do Not Stuff21M_B_DIM0_CLK_DDR08G28G2 2RF-GP0D675V_S0 6 6 6 M_B_BS0 M_B_BS1 M_B_BS2C1 R20 1 R22 1 R24 1 R26 1 R28 1 R30 1 R32 1 R342 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP1M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15 1D35V_S3 RAM3 6 6 6 M_B_WE# M_B_CAS# M_B_RAS# 6 M_B_DIM0_CLK_DDR0 6 M_B_DIM0_CLK_DDR#0 6 M_B_DIM0_CKE0C1430 SC1D6P25V1CN-GP1M_B_DIM0_CLK_DDR0_CM_B_A06 6 6M_B_BS0 M_B_BS1 M_B_BS221C1421 SC1U6D3V2KX-L-1-GPSCD1U10V1KX-GP C1458SCD1U10V1KX-GP C1459SCD1U10V1KX-GP C14606 M_B_DIM0_CLK_DDR0 6 M_B_DIM0_CLK_DDR#0 6 M_B_DIM0_CKE0Tracew should be at least 20 mils wide2C1432 SCD1U10V1KX-GPC212M_VREF_DQ_DIMMB R1440 37 DDR_WR_VREF_CHB R1441DDR_VREF_S3RF-GP6 6 6M_B_WE# M_B_CAS# M_B_RAS#12Do Not Stuff1DY2Do Not StuffMT41J256M16RE-107-D-GPMT41J256M16RE-107-D-GP1D35V_S3 RAM4 1D35V_S322222222222222222M_VREF_DQ_DIMMB DDR_VREF_S3H1 M8 VRAM_CH_B_ZQ_3 L8M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14VREFDQ VREFCA ZQ A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 BA0 BA1 BA2 CK CK# CKE UDM LDM WE# CAS# RAS#LDQS LDQS# ODT CS# RESET# NC#M7 NC#L9 NC#L1 NC#J9 NC#J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQF3 G3 K1 L2 T2 M7 L9 L1 J9 J1 J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 G1 F9 E8 E2 D8 D1 B9 B1 G9M_B_DQS5 M_B_DQS#5 M_B_DIM0_ODT0 6VREFDQ VREFCA ZQ A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 BA0 BA1 BA2 CK CK# CKE UDM LDM WE# CAS# RAS#LDQS LDQS# ODT CS# RESET# NC#M7 NC#L9 NC#L1 NC#J9 NC#J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQF3 G3 K1 L2 T2 M7 L9 L1 J9 J1 J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 G1 F9 E8 E2 D8 D1 B9 B1 G9M_B_DQS7 M_B_DQS#7 M_B_DIM0_ODT0 6222221RF-GP2N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M2 N8 M3 J7 K7 K9 D3 E7 L3 K3 J3RF-GPM_B_DIM0_CS#0 6 DDR3_DRAMRST# 15,37 M_B_A15 VRAM_CH_B_ZQ1_3R1446 Do Not Stuff6 6 6M_B_BS0 M_B_BS1 M_B_BS26 6 6M_B_BS0 M_B_BS1 M_B_BS2M2 N8 M3 J7 K7 K9 D3 E7 L3 K3 J328GM_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T71M_B_DIM0_CS#0 6 DDR3_DRAMRST# 15,37 M_B_A15 VRAM_CH_B_ZQ1_42211R1447 Do Not Stuff8G2PETER -SA6 M_B_DIM0_CLK_DDR0 6 M_B_DIM0_CLK_DDR#0 6 M_B_DIM0_CKE06 M_B_DIM0_CLK_DDR0 6 M_B_DIM0_CLK_DDR#0 6 M_B_DIM0_CKE0A6 6 6M_B_WE# M_B_CAS# M_B_RAS#6 6 6M_B_WE# M_B_CAS# M_B_RAS#2BUDQS UDQS#2A8 A1 C1 C9 D2 E9 F1 H9 H2VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQDQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ151111111111C7 B7M_B_DQS4 M_B_DQS#4M_VREF_DQ_DIMMB DDR_VREF_S3H1 M8 VRAM_CH_B_ZQ_4 L8UDQS UDQS#C7 B7M_B_DQS6 M_B_DQS#61111111D7 C3 C8 C2 A7 A2 B8 A3M_B_DQ34 M_B_DQ32 M_B_DQ38 M_B_DQ36 M_B_DQ35 M_B_DQ33 M_B_DQ39 M_B_DQ37A8 A1 C1 C9 D2 E9 F1 H9 H2VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQDQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ1512SCD1U10V1KX-GP SCD1U10V1KX-GP C1418K8 K2 N1 R9 B2 D9 G7 R1 N9VDD VDD VDD VDD VDD VDD VDD VDD VDDDQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7E3 F7 F2 F8 H3 H8 G2 H7M_B_DQ42 M_B_DQ44 M_B_DQ47 M_B_DQ45 M_B_DQ43 M_B_DQ41 M_B_DQ46 M_B_DQ40K8 K2 N1 R9 B2 D9 G7 R1 N9VDD VDD VDD VDD VDD VDD VDD VDD VDDDQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3M_B_DQ61 M_B_DQ57 M_B_DQ60 M_B_DQ56 M_B_DQ59 M_B_DQ58 M_B_DQ63 M_B_DQ62 M_B_DQ54 M_B_DQ50 M_B_DQ55 M_B_DQ51 M_B_DQ48 M_B_DQ52 M_B_DQ53 M_B_DQ49 SCD1U10V1KX-GP EC1401 EC1401 SCD1U10V1KX-GP EC1402 SCD1U10V1KX-GP EC1403 SCD1U10V1KX-GP EC1404 SCD1U10V1KX-GP EC1405SODIMM A DECOUPLINGLayout Note: Place these Caps near SO-DIMMA.SCD1U10V1KX-GP C1410 SCD1U10V1KX-GP C1409 SC10U6D3V2MX-GP-U C1440 SC10U6D3V2MX-GP-U C11111111 1SCD1U10V1KX-GP C1422 SCD1U10V1KX-GP C1423M_B_DIM0_CLK_DDR#0SC10U6D3V2MX-GP-U CSC10U6D3V2MX-GP-U C1404SC10U6D3V2MX-GP-U C1406SC10U6D3V2MX-GP-U C1407SCD1U10V1KX-GP CSCD1U10V1KX-GP C1416SCD1U10V1KX-GP C1417SCD1U10V1KX-GP C1425SCD1U10V1KX-GP CSCD1U10V1KX-GP C1444SCD1U10V1KX-GP SCD1U10V1KX-GP C1420SCD1U10V1KX-GP C1446SCD1U10V1KX-GP C1445SCD1U10V1KX-GP EC1406BAMT41J256M16RE-107-D-GP MT41J256M16RE-107-D-GPSTORMWistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. TitleDDR3L-MEMDOWNSize Custom Date:5 4 3 2Document NumberRevWednesday, June 27, 20121StormSheet 14 of-110254321SSID = MEMORY1D35V_S3 RAM5 K8 K2 N1 R9 B2 D9 G7 R1 N9 A8 A1 C1 C9 D2 E9 F1 H9 H2 M_VREF_DQ_DIMMA DDR_VREF_S3 H1 M8 VRAM_CH_A_ZQ_1 L8 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M2 N8 M3 J7 K7 K9 D3 E7 L3 K3 J3 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VREFDQ VREFCA ZQ A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 BA0 BA1 BA2 CK CK# CKE UDM LDM WE# CAS# RAS# VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 UDQS UDQS# LDQS LDQS# ODT CS# RESET# NC#M7 NC#L9 NC#L1 NC#J9 NC#J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 C7 B7 F3 G3 K1 L2 T2 M7 L9 L1 J9 J1 J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 G1 F9 E8 E2 D8 D1 B9 B1 G9 M_A_A15 VRAM_CH_A_ZQ1_1 1 M_A_DQ3 M_A_DQ6 M_A_DQ5 M_A_DQ2 M_A_DQ4 M_A_DQ7 M_A_DQ1 M_A_DQ0 M_A_DQ8 M_A_DQ13 M_A_DQ12 M_A_DQ9 M_A_DQ11 M_A_DQ14 M_A_DQ15 M_A_DQ10 M_A_DQS1 M_A_DQS#1 M_A_DQS0 M_A_DQS#0 M_A_DIM0_ODT0 M_A_DIM0_CS#0 DDR3_DRAMRST# 6 1 6 14,37 RF-GP 2 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M2 N8 M3 J7 K7 K9 D3 E7 L3 K3 J3 M_VREF_DQ_DIMMA DDR_VREF_S3 1D35V_S3 RAM6 K8 K2 N1 R9 B2 D9 G7 R1 N9 A8 A1 C1 C9 D2 E9 F1 H9 H2 H1 M8 VRAM_CH_A_ZQ_2 L8 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VREFDQ VREFCA ZQ A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 BA0 BA1 BA2 CK CK# CKE UDM LDM WE# CAS# RAS# VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 UDQS UDQS# LDQS LDQS# ODT CS# RESET# NC#M7 NC#L9 NC#L1 NC#J9 NC#J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 C7 B7 F3 G3 K1 L2 T2 M7 L9 L1 J9 J1 J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 G1 F9 E8 E2 D8 D1 B9 B1 G9 M_A_A15 VRAM_CH_A_ZQ1_2 37 DDR_WR_VREF_CHA 1 R1546 Do Not Stuff 1 M_A_DQ22 M_A_DQ21 M_A_DQ17 M_A_DQ18 M_A_DQ16 M_A_DQ23 M_A_DQ20 M_A_DQ19 M_A_DQ29 M_A_DQ28 M_A_DQ24 M_A_DQ30 M_A_DQ25 M_A_DQ31 M_A_DQ27 M_A_DQ26 M_A_DQS3 M_A_DQS#3 M_A_DQS2 M_A_DQS#2 M_A_DIM0_ODT0 M_A_DIM0_CS#0 DDR3_DRAMRST# 6 6 14,37 SCD1U10V1KX-GP C15216 6M_A_A[15:0] M_A_DQ[63:0]DDR_VREF_S3M_VREF_DQ_DIMMA6 M_A_DQS#[7:0] 6 M_A_DQS[7:0]SCD1U10V1KX-GP C1523SCD1U10V1KX-GP C1524SCD1U10V1KX-GP SCD1U10V1KX-GP C1525SCD1U10V1KX-GP C1529SCD1U10V1KX-GP C1535SCD1U10V1KX-GP C1538SCD1U10V1KX-GP C15421111111D1D22222220D675V_S0C1 R41 1 R22 1 R24 1 R26 1 R28 1 R30 1 R32 1 R342 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GPM_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15 RF-GP21M_VREF_DQ_DIMMA R1506 2 Do Not Stuff 1 R1505DDR_VREF_S3DY2R1545 Do Not StuffDo Not Stuff8G28G26 6 6M_A_BS0 M_A_BS1 M_A_BS26 6 6M_A_BS0 M_A_BS1 M_A_BS20D675V_S06 M_A_DIM0_CLK_DDR0 6 M_A_DIM0_CLK_DDR#0 6 M_A_DIM0_CKE06 M_A_DIM0_CLK_DDR0 6 M_A_DIM0_CLK_DDR#0 6 M_A_DIM0_CKE011C1541 SC1U6D3V2KX-L-1-GPC26 6 6M_A_WE# M_A_CAS# M_A_RAS#6 6 6M_A_WE# M_A_CAS# M_A_RAS#MT41J256M16RE-107-D-GP MT41J256M16RE-107-D-GP 1D35V_S3 RAM7 0D675V_S0 K8 K2 N1 R9 B2 D9 G7 R1 N9 A8 A1 C1 C9 D2 E9 F1 H9 H2 M_VREF_DQ_DIMMA DDR_VREF_S3 H1 M8 L8 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M2 N8 M3 J7 K7 K9 D3 E7 L3 K3 J3 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VREFDQ VREFCA ZQ A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 BA0 BA1 BA2 CK CK# CKE UDM LDM WE# CAS# RAS# VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 UDQS UDQS# LDQS LDQS# ODT CS# RESET# NC#M7 NC#L9 NC#L1 NC#J9 NC#J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 C7 B7 F3 G3 K1 L2 T2 M7 L9 L1 J9 J1 J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 G1 F9 E8 E2 D8 D1 B9 B1 G9 M_A_A15 VRAM_CH_A_ZQ1_3 1 M_A_DQ39 M_A_DQ34 M_A_DQ32 M_A_DQ38 M_A_DQ37 M_A_DQ35 M_A_DQ36 M_A_DQ33 M_A_DQ43 M_A_DQ47 M_A_DQ45 M_A_DQ40 M_A_DQ46 M_A_DQ44 M_A_DQ41 M_A_DQ42 M_A_DQS5 M_A_DQS#5 M_A_DQS4 M_A_DQS#4 M_A_DIM0_ODT0 6 M_VREF_DQ_DIMMA DDR_VREF_S3 VRAM_CH_A_ZQ_4 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 1D35V_S3 RAM8 K8 K2 N1 R9 B2 D9 G7 R1 N9 A8 A1 C1 C9 D2 E9 F1 H9 H2 H1 M8 L8 N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7 M2 N8 M3 J7 K7 K9 D3 E7 L3 K3 J3 VDD VDD VDD VDD VDD VDD VDD VDD VDD VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VREFDQ VREFCA ZQ A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 BA0 BA1 BA2 CK CK# CKE UDM LDM WE# CAS# RAS# VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 UDQS UDQS# LDQS LDQS# ODT CS# RESET# NC#M7 NC#L9 NC#L1 NC#J9 NC#J1 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS E3 F7 F2 F8 H3 H8 G2 H7 D7 C3 C8 C2 A7 A2 B8 A3 C7 B7 F3 G3 K1 L2 T2 M7 L9 L1 J9 J1 J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1 G1 F9 E8 E2 D8 D1 B9 B1 G9 M_A_A15 VRAM_CH_A_ZQ1_4 1 M_A_DQ51 M_A_DQ50 M_A_DQ53 M_A_DQ54 M_A_DQ49 M_A_DQ55 M_A_DQ52 M_A_DQ48 M_A_DQ63 M_A_DQ57 M_A_DQ58 M_A_DQ56 M_A_DQ62 M_A_DQ60 M_A_DQ59 M_A_DQ61 M_A_DQS7 M_A_DQS#7 M_A_DQS6 M_A_DQS#6 M_A_DIM0_CLK_DDR#0 2 M_A_DIM0_CLK_DDR01 R13 1 R31 1 R15 1 R17 1 R15182 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GP 2 33R1F-GPM_A_DIM0_CKE0 M_A_DIM0_ODT0 M_A_DIM0_CS#0 M_A_RAS# M_A_CAS# M_A_WE# M_A_BS0 M_A_BS1 M_A_BS2RF-GP 1 C1533 SC1D6P25V1CN-GP 122M_A_DIM0_CLK_DDR#0_CC SCD1U10V1KX-GP2RF-GP 1VRAM_CH_A_ZQ_3 M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14B12SCD1U10V1KX-GP C1544RF-GP 221RF-GPBM_A_DIM0_CS#0 6 DDR3_DRAMRST# 14,37M_A_DIM0_ODT06M_A_DIM0_CS#0 6 DDR3_DRAMRST# 14,37R1547 Do Not Stuff8G2R1548 Do Not Stuff8G26 6 6M_A_BS0 M_A_BS1 M_A_BS26 M_A_DIM0_CLK_DDR0 6 M_A_DIM0_CLK_DDR#0 6 M_A_DIM0_CKE06 6 6M_A_BS0 M_A_BS1 M_A_BS26 M_A_DIM0_CLK_DDR0 6 M_A_DIM0_CLK_DDR#0 6 M_A_DIM0_CKE06 6 6M_A_WE# M_A_CAS# M_A_RAS#MT41J256M16RE-107-D-GP6 6 6M_A_WE# M_A_CAS# M_A_RAS#MT41J256M16RE-107-D-GPA A1D35V_S3David -SASTORM SC10U6D3V2MX-GP-U C15285SC10U6D3V2MX-GP-U C1519SC10U6D3V2MX-GP-U SC10U6D3V2MX-GP-U C1547SC10U6D3V2MX-GP-U C1549SC10U6D3V2MX-GP-U CSCD1U10V1KX-GP C1537SCD1U10V1KX-GP C1527SCD1U10V1KX-GP SCD1U10V1KX-GP C1512SCD1U10V1KX-GP C1515SCD1U10V1KX-GP CSCD1U10V1KX-GP C1530SCD1U10V1KX-GP C1540SCD1U10V1KX-GP C1513SCD1U10V1KX-GP C1514SCD1U10V1KX-GP SCD1U10V1KX-GP CSCD1U10V1KX-GP C1548SCD1U10V1KX-GP C1536SCD1U10V1KX-GP C1543SCD1U10V1KX-GP C1546SCD1U10V1KX-GP SCD1U10V1KX-GP C1539SCD1U10V1KX-GP C1552SCD1U10V1KX-GP CSCD1U10V1KX-GP C1550SCD1U10V1KX-GP C1551SCD1U10V1KX-GP SCD1U10V1KX-GP C1553SCD1U10V1KX-GP C155411111111111111111111111111Wistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title22222222222222222222222222DDR3L-MEMDOWN2Size A2 Date: Document Number Monday, June 25, 2012 RevStormSheet1-115 of 10243254321DDC(Blanking)CBBSTORMAWistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. TitleADDR3-SODIMM3Size A4 Date:5 4 3 2Document NumberRevStorm Monday, June 25, 2012-1Sheet 161of10254321DDPCH1D RN17024 OF 101 24 3SRN100KJ-6-GPPCH_BKLT_EN PCH_LCDVDD_EN27 PCH_BKLT_EN 49 PCH_LCDVDD_EN 49 PCH_BKLT_CTLJ47 M45 P45 T40 K47 T45 P39 AF37 AF36 AE48 AE47 AK39 AK40L_BKLTEN L_VDD_EN L_BKLTCTL L_DDC_CLK L_DDC_DATA L_CTRL_CLK L_CTRL_DATA LVD_IBG LVD_VBG LVD_VREFH LVD_VREFL LVDSA_CLK# LVDSA_CLK LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3 LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3 LVDSB_CLK# LVDSB_CLK LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3 LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3SDVO_TVCLKINN SDVO_TVCLKINP SDVO_STALLN SDVO_STALLP SDVO_INTN SDVO_INTPAP43 AP45 AM42 AM40 AP39 AP40SDVO_CTRLCLK SDVO_CTRLDATA DDPB_AUXN DDPB_AUXP DDPB_HPDP38 M39 AT49 AT47 AT40 AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49 P46 P42 AP47 AP49 AT38 AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49 M43 M36 AT45 AT43 BH41 BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42PCH_HDMI_CLK 51 PCH_HDMI_DATA 51HDMI_PCH_DET51LVDSCAN47 AM49 AK49 AJ47 AF40 AF39 AH45 AH47 AF49 AF45 AH43 AH49 AF47 AF43Digital Display InterfaceAN48 AM47 AK47 AJ48DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P DDPC_CTRLCLK DDPC_CTRLDATA DDPC_AUXN DDPC_AUXP DDPC_HPD DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P DDPD_CTRLCLK DDPD_CTRLDATA DDPD_AUXN DDPD_AUXP DDPD_HPD DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3PHDMI_DATA2_R# 51 HDMI_DATA2_R 51 HDMI_DATA1_R# 51 HDMI_DATA1_R 51 HDMI_DATA0_R# 51 HDMI_DATA0_R 51 HDMI_CLK_R# 51 HDMI_CLK_R 51C3D3V_S0 RN1706 PCH_HDMI_DATA PCH_HDMI_CLK1 24 3SRN2K2J-1-GPN48 P49 T49BCRT_BLUE CRT_GREEN CRT_RED CRT_DDC_CLK CRT_DDC_DATA CRT_HSYNC CRT_VSYNC DAC_IREF CRT_IRTNPANTHER-GP-NFBT39 M40 M47 M49DAC_IREF_R2T43 T42RF-GPCRT71.PANTH.00Uif use CRT change 1K to +/- 0.5% (64.10016.6DL)1ASTORMAWistron Corporation21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. TitlePCH (LVDS/CRT/DDI)Size A3 Date:5 4 3 2Document Number Tuesday, June 26, 2012RevStormSheet1-117 of 10254321PCH1E5 OF 10DRN1801 SRN8K2J-2-GP-U CIO_PLUG_EVENT_PCH INT_PIRQD# INT_PIRQC# INT_PIRQB# 3D3V_S01 2 3 4 510 9 8 7 6Touch_Screen_INT INT_PIRQA# INT_PIRQE# TP_IN#3D3V_S0B21 M20 AY16 BG46RSVDBG26 BJ26 BH25 BJ16 BG16 AH38 AH37 AK43 AK45 C18 N30 H3 AH12 AM4 AM5 Y13 K24 L24 AB46 AB45TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10 TP11 TP12 TP13 TP14 TP15 TP16 TP17 TP18 TP19 TP20RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27AY7 AV7 AU3 BG4 AT10 BC8 AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6 AV5 AV10 AT8 AY5 BA2 AT12 BF3C DTP21 TP22 TP23 TP24C62 USB30_RN1 62 USB30_RN2 62 USB30_RP1 62 USB30_RP262 62 62 62USB30_TN1 USB30_TN2 USB30_TP1 USB30_TP2BE28 BC30 BE32 BJ32 BC28 BE30 BF32 BG32 AV26 BB26 AU28 AY30 AU26 AY26 AV28 AW30USB3RN1 USB3RN2 USB3RN3 USB3RN4 USB3RP1 USB3RP2 USB3RP3 USB3RP4 USB3TN1 USB3TN2 USB3TN3 USB3TN4 USB3TP1 USB3TP2 USB3TP3 USB3TP4RSVD28 RSVD29PCIINT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#K40 K38 H38 G38 C46 C44 E40PIRQA# PIRQB# PIRQC# PIRQD# REQ1#/GPIO50 REQ2#/GPIO52 REQ3#/GPIO54 GNT1#/GPIO51 GNT2#/GPIO53 GNT3#/GPIO55 PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5 PME# PLTRST# CLKOUT_PCI0 CLKOUT_PCI1 CLKOUT_PCI2 CLKOUT_PCI3 CLKOUT_PCI4PANTHER-GP-NFBD47 E42 F46INT_PIRQE# CIO_PLUG_EVENT_PCH 49 Touch_Screen_INTG42 G40 C42 D44 K10USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P USBRBIAS# USBRBIAS OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43 OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32 C33 B33USB_RBIASUSB_PN0 USB_PP0 USB_PN1 USB_PP1 USB_PN3 USB_PP3 USB_PN4 USB_PP4 USB_PN5 USB_PP5 USB_PN6 USB_PP662 62 61 61 49 49 32 32 65 65 49 490 1 2 3 4 5 6 7 8 9 10 11 12BUSB1 RD6R1F-GPSA69TP_IN#3D3V_PCH_DS3-SB71 20 27 81 CLK_PCI_LPC CLK_PCI_FB CLK_PCI_KBC CLK_PCI_TPM CLK_PCI_TPM CLK_PCI_LPC CLK_PCI_FB CLK_PCI_KBC5,27,36,65,71,75,81,97 R RPLT_RST#C6CLK_PCI_LPC_R CLK_PCI_FB_R CLK_PCI_KBC_R CLK_PCI_TPM_RDY1 1 1 1 2 2 2 2USB_OCDYDo Not Stuff EC1801ADYDo Not Stuff Do Not Stuff EC1802DYDo Not Stuff EC1803DYDo Not Stuff EC1804 EC1804 STORMA11112Do Not Stuff 22R2J-2-GP 22R2J-2-GP 22R2J-2-GPH49 H43 J48 K42 H40A14 K20 B17 C16 L16 A16 D14 C141RJ-GPWistron Corporation21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date: Document Number Monday, June 25, 2012 Sheet12222Rev 18 of 102543254321PCH1C 4 DMI_RXN[3:0] DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3 DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3 DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3 DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP33 OF 10DBC24 BE20 BG18 BG20 BE24 BC20 BJ18 BJ20 AW24 AW20 BB18 AV18 AY24 AY20 AY18 AU18 BJ244DMI_RXP[3:0]DMI0RXN DMI1RXN DMI2RXN DMI3RXN DMI0RXP DMI1RXP DMI2RXP DMI3RXP DMI0TXN DMI1TXN DMI2TXN DMI3TXN DMI0TXP DMI1TXP DMI2TXP DMI3TXP DMI_ZCOMP DMI_IRCOMP DMI2RBIASFDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7 FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7 FDI_INTBJ14 AY14 BE14 BH13 BC12 BJ12 BG10 BG9 BG14 BB14 BF14 BG13 BE12 BG12 BJ10 BH9 AW16 AV12 BC10 AV14 BB10FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7 FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7FDI_TXN[7:0]4DFDI_TXP[7:0] 44 DMI_TXN[3:0]DMI4DMI_TXP[3:0]FDIFDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC14 4 4 4 41D05V_VTT RFDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC11 12 49D9R1F-GP 2 750R2F-GPDMI_COMP_R RBIAS_CPYBG25 BH21DY1 R1906 2 Do Not Stuff 1 RKR1J-GPSYS_PW ROK PW ROKFor platforms not supporting Deep S4/S5 1.VccSUS3_3 and VccDSW3_3 will rise at the same time (connected on board) 2.DPWROK and RSMRST# will rise at the same time (connected on board) 3.SLP_SUS# and SUSACK# are left as ‘no connect’ 4.SUSWARN# used as SUSPWRDNACK/GPIO30PM_RSMRST# PCH_DPW ROK 27CCSystem Power ManagementSA__DS327 PM_SUSACK# 3D3V_S0 R1905 1DSWVRMEN C12SYS_RESET#A18DSW ODVRENDY R19101 2 Do Not Stuff 1 R1911 2Do Not StuffSUSACK# SYS_RESET# SYS_PWROK PWROK APWROK DRAMPWROK RSMRST#DPWROK WAKE# CLKRUN#/GPIO32 SUS_STAT#/GPIO61 SUSCLK/GPIO62 SLP_S5#/GPIO63 SLP_S4# SLP_S3# SLP_A# SLP_SUS# PMSYNCH SLP_LAN#/GPIO29E22 PCH_DPW ROK_R B9 N3 G8 N14PCH_PCIE_W AKE# PM_CLKRUN#2 10KR1J-GPK3 P121RJ-GPDSWODVREN - On Die DSW VR Enable HIGH LOW Enabled (DEFAULT) Disabled36 SYS_PW ROK 27 S0_PW R_GOODDS3PM_SUS_STAT# 812 R19031PW ROKL22 L10 B13Do Not Stuff2RTC_AUX_S537 PM_DRAM_PW RGD PM_RSMRST#D10 H4 F4 G10 G16 AP14 K14RJ-GP R1917BC21 K16 E20 H20PM_SLP_S4# 27,46 H_PM_SYNC PM_SLP_S3# 27-SD1TP1905DSW ODVRENR191512 330KR2J-L1-GP27 PM_SUSW ARN# 27,97 PM_PW RBTN#BSUSWARN#/SUSPWRDNACK/GPIO30 PWRBTN# ACPRESENT/GPIO31 BATLOW#/GPIO72 RI#PANTHER-GP-NF3D3V_PCH_DS327 AC_PRESENT BATLOW #PM_SLP_SUS# 27,80 R1913 PM_CLKRUN#3D3V_S0E10 A10R21 10KR2J-L-GP 2 1 10KR2J-L-GPBATLOW # PM_RI# PM_RI#H_PM_SYNC51 1DY 2 Do Not StuffR1928D2 DY 1 Do Not StuffPM_SUSACK# PM_SUSW ARN#3D3V_AUX_S5PM_RSMRST#121KR2J-L2-GPRSMRST#_KBC 27R Do Not Stuff DY 3D3V_S52GRJ-GPQ1901 FK3303010L-GP84.S3D3V_PCH_DS31R1932 1 DY 2 Do Not Stuff R1924 2 DY 1 Do Not Stuff R1927 2 DY 1 Do Not StuffAC_PRESENT PM_SUSW ARN# BATLOW #1S3V_5V_POK_#ARJ-L-GP R1912 STORMA84.FK3303010L-GP Q1902GPM_SLP_SUS#_R212Do Not Stuff R19183V_5V_POK412R 10KR1J-GPPCH_PCIE_W AKE#71.PANTH.00UWistron Corporation21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date: Document Number Monday, June 25, 2012 Sheet1D100KR1J-GP2C1901 SCD1U10V1KX-GP11 R19082PM_RSMRST#1 DY 2 Do Not StuffPM_SLP_SUS#Rev 19 of 1025432543213D3V_PCH_DS3 RN2008 SRN2K2J-1-GP 1 2 RN2004 SRN2K2J-1-GP 1 2 RN2005 SRN2K2J-1-GP 1 2DSMB_DATA SMB_CLK4 3SML0_DATA SML0_CLKD4 3SML1_CLK SML1_DATA PCH1B BG34 BJ34 AV32 AU32 BE34 BF34 BB32 AY32 BG36 BJ36 AV34 AU34 65 65 65 65 PCIE_RXN4 PCIE_RXP4 PCIE_TXN4 PCIE_TXP4 BF36 BE36 AY34 BB34 BG37 BH37 AY36 BB36 BJ38 BG38 AU36 AV36 BG40 BJ40 AY40 BB40 BE38 BC38 AW38 AY38 Y40 Y39 PCIE_CLK_REQ0# J2 AB49 AB47 PCIE_CLK_REQ1# M1 AA48 AA47 PCIE_CLK_REQ2# V10 Y37 Y36 A8 Y43 Y45 PCIE_CLK_REQ4# L12 V45 V46 PCIE_LAN_CLKREQ# L14 AB42 AB40 PEG_B_CLKRQ# 3D3V_S0 RN 3 4 PCIE_CLK_REQ1# PCIE_CLK_REQ2# PCIE_CLK_REQ6# V40 V42 T13 V38 V37 PCIE_CLK_REQ7# K12 AK14 AK13 CLKOUT_PCIE6N CLKOUT_PCIE6P PCIECLKRQ6#/GPIO45 CLKOUT_PCIE7N CLKOUT_PCIE7P PCIECLKRQ7#/GPIO46 CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P PANTHER-GP-NF E6 PERN1 PERP1 PETN1 PETP1 PERN2 PERP2 PETN2 PETP2 PERN3 PERP3 PETN3 PETP3 PERN4 PERP4 PETN4 PETP4 PERN5 PERP5 PETN5 PETP5 PERN6 PERP6 PETN6 PETP6 PERN7 PERP7 PETN7 PETP7 PERN8 PERP8 PETN8 PETP8 CLKOUT_PCIE0N CLKOUT_PCIE0P PCIECLKRQ0#/GPIO73 CLKOUT_PCIE1N CLKOUT_PCIE1P PCIECLKRQ1#/GPIO18 CLKOUT_DP_N CLKOUT_DP_P CLKOUT_PCIE2N CLKOUT_PCIE2P PCIECLKRQ2#/GPIO20 CLKOUT_PCIE3N CLKOUT_PCIE3P PCIECLKRQ3#/GPIO25 CLKIN_DOT_96N CLKIN_DOT_96P CLKOUT_PCIE4N CLKOUT_PCIE4P PCIECLKRQ4#/GPIO26 CLKOUT_PCIE5N CLKOUT_PCIE5P PCIECLKRQ5#/GPIO44 CLKOUT_PEG_B_N CLKOUT_PEG_B_P PEG_B_CLKRQ#/GPIO56 XCLK_RCOMP Y47 XCLK_RCOMP 1 RD9R2F-1-GP 1D05V_VTT CLKIN_SATA_N CLKIN_SATA_P REFCLK14IN CLKIN_PCILOOPBACK XTAL25_IN XTAL25_OUT CLKIN_DMI_N CLKIN_DMI_P CLKIN_GND1_N CLKIN_GND1_P 2 OF 104 3FOR SIV,PLS near PCHDo Not Stuff Do Not Stuff TP2003 TP PCIE_RXN4 PCIE_RXP4SMBALERT#/GPIO11 SMBCLK SMBDATAE12 H14 C9EC_SWI# SMB_CLK SMB_DATAPCH_GPIO74 EC_SWI#R15 21 10KR2J-L-GP 1 10KR2J-L-GPDRAMRST_CNTRL_PCH1 R200921KR1J-GPSMBUSSML0ALERT#/GPIO60 SML0CLK SML0DATAA12 C8 G12 SML0_CLK SML0_DATADRAMRST_CNTRL_PCH37C1 12 SCD1U10V1KX-GP 2 SCD1U10V1KX-GPPCIE_TXN4_C PCIE_TXP4_CSML1ALERT#/PCHHOT#/GPIO74C13 E14 M16PCH_GPIO74 SML1_CLK 27,28 SML1_DATA 27,28 3D3V_S0 RN 3 4 SRN2K2J-1-GPPCI-E*SML1CLK/GPIO58 SML1DATA/GPIO75ControllerThunderboltCL_CLK1M7 T11 3D3V_S0LinkCL_DATA1 CL_RST1#Q2001 SMB_DATA 6 5 RJ-GP 4 1 2 3 PCH_SMBDATA 69CCP10 2PEG_A_CLKRQ#/GPIO47 CLKOUT_PEG_A_N CLKOUT_PEG_A_P CLKOUT_DMI_N CLKOUT_DMI_PM10 AB37 AB38 AV22 AU22 AM12 AM13 BF18 BE18 BJ30 BG30 G24 E24 AK7 AK5 K45 H45 V47 V49PEG_CLKREQ#_RPEG_CLKREQ#_R12N7002KDW-GP84.2N702.A3F 2nd = 84.DM601.03FPCH_SMBCLK SMB_CLK 69CLOCKSCLK_EXP_N CLK_EXP_P5 5 CLK_DP_N CLK_DP_P 5 5CLK_BUF_EXP_N CLK_BUF_EXP_P 3D3V_S0 CLK_BUF_CPYCLK_N CLK_BUF_CPYCLK_P CLK_BUF_DOT96_N CLK_BUF_DOT96_P 1 CLK_BUF_CKSSCD_N CLK_BUF_CKSSCD_P DGPU_PRSNT# CLK_BUF_REF14 RJ-GP 2 1 RN2009 CLK_BUF_CKSSCD_P CLK_BUF_CKSSCD_N 2 1 3 4B3D3V_S065 PCIE_CLK_WLAN# 65 PCIE_CLK_WLAN 3D3V_PCH_DS3 RN2001 SRN10KJ-10-GP-U PCIE_CLK_REQ4# 8 PCIE_LAN_CLKREQ# 7 PCIE_CLK_REQ6# 6 5 RN2002 SRN10KJ-10-GP-U PCIE_CLK_REQ0# 8 PCIE_CLK_REQ7# 7 PEG_B_CLKRQ# 6 PCIE_WLAN_CLKREQ# 5 65 PCIE_WLAN_CLKREQ#2RJ-GP 12 RJ-GP1 2 3 4UMA_DIS#22B1 2 3 4CLK_PCI_FB XTAL25_IN XTAL25_OUT18CLK_BUF_CPYCLK_P CLK_BUF_CPYCLK_NSRN10KJ-11-GP-U RN 1 4 SRN10KJ-11-GP-U RN 1 4 SRN10KJ-11-GP-U RN 1 4 SRN10KJ-11-GP-UCheck 48MhzR2014CLK_BUF_EXP_P CLK_BUF_EXP_N CLK48_Cardreader 32SRN10KJ-11-GP-UFLEX CLOCKSPCIECLKRQ1# and PCIECLKRQ2# Support S0 power onlyCLKOUTFLEX0/GPIO64 CLKOUTFLEX1/GPIO65 CLKOUTFLEX2/GPIO66 CLKOUTFLEX3/GPIO67K43 F47 H47 K49CLK48 DRAM_TYPE2 DRAM_TYPE3 DGPU_PRSNT#48MHZ2 1 EC2001133R2J-L1-GPDYCLK_BUF_DOT96_N CLK_BUF_DOT96_PDo Not Stuff3D3V_S011ELPIDA_8G2R2018 Do Not Stuff 2Hynix_4GRJ-GP1As Flex clocks, can be configured as 48 MHz/ 24 MHz, 33 MHz, 27 MHz (Spread or Nonspread), 14.318 MHz. Refer to the PCH External Design Specification (EDS) for configuration options of Flex Clocks.R2017 Do Not Stuff C2006 XTAL25_IN X2001 XTAL-25MHZ-202-GP 1 1 4 2 1 SC15P50V2JN-2-GPDY222 DRAM_TYPE1ADRAM_TYPE2 DRAM_TYPE3 RJ-GP 1 1 1282.30020.I612 3 2ARJ-GPR2019 Do Not StuffRJ-GPHynix_ELPIDA_4G_4G2ELPIDA_4G_8G2 2Hynix_ELPIDA_4G_8GC2005 XTAL25_OUT 1 SC15P50V2JN-2-GP 2STORMWistron Corporation21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A2 Date: Document Number Monday, June 25, 20121Rev Sheet 20 of 102543254321RTC_AUX_S5 RTC_X12 R10 1 RMR1J-GPRTC_X21 200KR2F-L-GP 1 200KR2F-L-GP 1C2103 SCD1U25V2KX-GPINTVRMEN- Integrated SUS 1.05V VRM Enable High - Enable internal VRs Low - Enable external VRsPCH1A 1 OF 10DD21 1X2101 2XTAL-32D768KHZ-30-GPC2101 SC18P50V2JN-1-GP SC18P50V2JN-1-GP1RTC_X2 RTC_RST# SRTC_RST#C20 D20 G22 K22 C17RTCX2 RTCRST# SRTCRST# INTRUDER# INTVRMEN82.30001.D512 212C2102 SC18P50V2JN-1-GPLPC-SB height concern,do not change to 0603, so change C from 1uF to 0.1uF change R from 20K to 200K for AFRG2101 Do Not Stuff RTC_AUX_S5LPC_AD[0..3]27,71,81RTC_X1A20RTCX1FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3 FWH4/LFRAME#C38 A38 B37 C37 D36 E36 K36 V5 AM3 AM1 AP7 AP5 AM10 AM8 AP11 AP10 AD7 AD5 AH5 AH4 AB8 AB10 AF3 AF1 Y7 Y5 AD3 AD1 Y3 Y1 AB3 AB1LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3 LPC_FRAME# 27,71,812C2104 SCD1U25V2KX-GP12 RMR1J-GP 1 R2105 2330KR2J-L1-GPSM_INTRUDER# PCH_INTVRMENRTCLDRQ0# LDRQ1#/GPIO23 SERIRQ SATA0RXN SATA0RXP SATA0TXN SATA0TXP SATA1RXN SATA1RXP SATA1TXN SATA1TXP SATA2RXN SATA2RXP SATA2TXN SATA2TXPINT_SERIRQ SATA_RXN0 SATA_RXP0 SATA_TXN0 SATA_TXP0 SATA_RXN1 SATA_RXP1 SATA_TXN1 SATA_TXP127,81 56 56 56 56 56 56 56 567PF 20PPM to 12.5PF 20PPMHDA_BITCLKN34 L34 T10Layout Note:Place close together.29 HDA_CODEC_SDOUTHDA_SYNC 29 HDA_SPKR HDA_RST#HDA_SYNC SPKR HDA_RST# HDA_SDIN0 HDA_SDIN11 R2120HDA_SDOUT 2 33R2J-L1-GPSATA 6GHDA_BCLKmSATA mSATASATA_RXN0 SATA_RXP0 SATA_RXN1 SATA_RXP1Layout Note:29 HDA_CODEC_RST#K34 E34 G341 R2121HDA_RST# 2 33R2J-L1-GP HDA_BITCLK 2 33R2J-L1-GPHDA_SDO and HDA_BCLK must be length matched to within 500 mils29 HDA_SDIN01 1 1 1TP2103 TP2104 TP2105 TP2106CC29 HDA_CODEC_BITCLK1 R2122C34 A34R2107 27 ME_UNLOCKIHDAHDA_SDIN2 HDA_SDIN3 HDA_SDOFlash Descriptor Security Overide HDA_SDOUT Low = Default High = Enable1 21KR2J-L2-GP HDA_SDOUTA36 C36 N32SATA3RXN SATA3RXP SATA3TXN SATA3TXPSATANo Reboot Strap+3VS_+1.5VS_HDA_IOHDA_DOCK_EN#/GPIO33 HDA_DOCK_RST#/GPIO13Low = Default HDA_SPKR High = No RebootHDA_SDOUTSATA4RXN SATA4RXP SATA4TXN SATA4TXP SATA5RXN SATA5RXP SATA5TXN SATA5TXPHDA_SDIN01TP2102R21151 1 R2102 2Do Not Stuff24K7R1J-GPPCH_JTAG_TCK_BUFJ3 H7 K5JTAG_TCK1D05V_VTTJTAGJTAG_TMS JTAG_TDI JTAG_TDOSATAICOMPO SATAICOMPI SATA3RCOMPOY11 Y10 AB12 AB13 AH1SATA3_COMP RBIAS_SATA3 SATA_COMP RD4R2F-GP 2DY PLL ODVR VOLTAGE+3VS_+1.5VS_HDA_IOH1Low = 1.8V (Default) HDA_SYNC High = 1.5VHDA_SYNCNew KBC check60 PCH_SPI_CLK 27,60 PCH_SPI_CS0#_R 27 PCH_SPI_CS1#_RSATA3COMPI T3 1 R18 233R1J-GP PCH_SPI_CS0# PCH_SPI_CS1# 33R1J-GP1 RD9R1F-GP 1 RR2F-GPB1 RKR1J-GPBSPI_CLK SPI_CS0#SATA3RBIASY14 T1 V4 U3SPI2SPI_CS1# SPI_MOSI SPI_MISOPANTHER-GP-NF29 HDA_CODEC_SYNCHDA_CODEC_SYNCDY1 2 R2116 Do Not StuffSATALED# SATA0GP/GPIO21 SATA1GP/GPIO19P3 V14 P1SATA_LED# SATA_DET#0 SATA_LED# INT_SERIRQ SATA_DET#0HDA_SYNC60 PCH_SPI_MOSI 60 PCH_SPI_MISO5V_S0HDA_SYNC_R 1 HDA_SYNC 2 RJ-GP1 2 3 43D3V_S0 RN2103 SRN10KJ-10-GP-U 8 7 6 571.PANTH.00UDGQ2101 FK3303010L-GP84.RTC_RST#SHDA_CODEC_SYNC 27 RTCRST_ONDGQ2102 FK3303010L-GPA22EC2102 Do Not StuffEC2103 Do Not Stuff2HDA_SYNC: This strap is sampled on rising edge of RSMRST# and is used to sample 1.5V VccVRM supply mode. 1K external pull-up resistor is required on this signal on the board. Signal may have leakage paths via powered off devices(Audio Codec) and hence contend with the external pull-up. A blocking FET is recommended in such a case to isolate HDA_SYNC from the Audio Codec device until after the Strap sampling is complete.84.S 1RTC_RST#_R1HDA_CODEC_BITCLK HDA_CODEC_SDOUTRJ-GPSTORM RR1J-GPAWistron Corporation21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date: Document Number Tuesday, June 26, 2012 Sheet1DY1DY12Rev 21 of 102543254321PCH1F 3D3V_S0 RN2203 H_RCIN# H_A20GATE 27 EC_SCI# S_GPIO EC_SMI#6 OF 10T7 A42 H36 E38 C10 C4 G2 U2 D40BMBUSY#/GPIO0 TACH1/GPIO1 TACH2/GPIO6 TACH3/GPIO7 GPIO8 LAN_PHY_PWR_CTRL/GPIO12 GPIO15 SATA4GP/GPIO16TACH4/GPIO68 TACH5/GPIO69 TACH6/GPIO70 TACH7/GPIO71C40 B41 C41D1 2D4 3UMA_DIS#20DGPU_HPD_INTR# EC_SCI# ICC_EN# PCH_GPIO12 PCH_GPIO15 RV_S0 PCH_GPIO16SRN10KJ-11-GP-UA40PCH:no Turbo control via PECI KBC(Recommended):EC collect all thermal data and Performs Turbo power controlA20GATE PECI RCIN#P4 AU16 P5 AY11 AY10 T14 AY1 AH8 AK11H_A20GATE H_PECI_R H_RCIN#H_A20GATE 27121 R2203DY2 Do Not StuffH_PECI H_RCIN#5,27 27 5,9710KR1J-GPGPIOCPU/MISCTACH0/GPIO17 SCLOCK/GPIO22 GPIO24 GPIO27 GPIO28 STP_PCI#/GPIO34PROCPWRGD THRMTRIP# INIT3_3V# DF_TVS TS_VSS1 TS_VSS2H_CPUPW RGD PCH_THERMTRIP_R56SATA_RAID0T5 E81 RR2F-2GPH_THERMTRIP# 5,3627 PCH_GPIO27#1 R2223DYPSW _CLR#1RR1J-GP2 PCH_GPIO27 Do Not Stuff PLL_ODVR_ENE16 P8 K1 K4 V8 M5 N2 M3 V13NV_CLE1D8V_S02FP_DET# G2201 Do Not Stuff DMI_OVRVLTG FDI_OVRVLTGGPIO35 TS_VSS3 SATA2GP/GPIO36 TS_VSS4 SATA3GP/GPIO37 SLOAD/GPIO38 SDATAOUT0/GPIO39 SDATAOUT1/GPIO48 SATA5GP/GPIO49/TEMP_ALERT# GPIO57 VSS_NCTF_15#BG2 VSS_NCTF_16#BG48 VSS_NCTF_17#BH3 VSS_NCTF_18#BH47 NC_1AK10 P37FDI_OVRVLTGNV_CLEC1 R22292 1KR1J-GP2AH10H_SNB_IVB#5C1MFG_MODE EDP#_LVDS1 2 3 4RN2201 SRN10KJ-10-GP-U EC_SMI# 8 EC_SCI# 7 DGPU_HPD_INTR# 6 PCH_TEMP_ALERT# 5 RN2202 SRN10KJ-10-GP-U 8 7 6 5PCH_TEMP_ALERT# USB3_PW R_ON13D3V_S0FDI TERMINATION VOLTAGE OVERRIDE(Reserved)BG2 BG48 BH3 BH47 BJ4DMI_OVRVLTG RJ-GP20 DRAM_TYPE1V3 D6FDI_OVRVLTG (GPIO37)LOW - Tx, Rx terminated to same voltage (DC Coupling Model DEFAULT)A4 A44PSW _CLR# FP_DET# MFG_MODE S_GPIOVSS_NCTF_1#A4VSS_NCTF_19#BJ4NCTF21 2 3 4VSS_NCTF_2#A44 VSS_NCTF_3#A45 VSS_NCTF_4#A46 VSS_NCTF_5#A5VSS_NCTF_20#BJ44 VSS_NCTF_21#BJ45 VSS_NCTF_22#BJ46 VSS_NCTF_23#BJ5BJ44 BJ45 BJ46 2 BJ5 BJ6 C2 C48 D1 D49 E1 E49 1 F1 F49RJ-GP ICC_EN# RJ-GPDMI TERMINATION VOLTAGE OVERRIDE(Reserved)1A45EDP#_LVDSA46 2 A5RJ-GPDMI_OVRVLTG (GPIO36)LOW - Tx, Rx terminated to same voltage (DC Coupling Model DEFAULT)1B3 B47 BD1VSS_NCTF_7#B3 VSS_NCTF_8#B47 VSS_NCTF_9#BD1 VSS_NCTF_10#BD49 VSS_NCTF_11#BE1 VSS_NCTF_12#BE49 VSS_NCTF_13#BF1 VSS_NCTF_14#BF49PANTHER-GP-NFNCTF TEST PIN: A4,A44,A45,A46,A5,A6,B3,B47, BD1,BD49,BE1,BE49,BF1,BF49, BG2,BG48,BH3,BH47,BJ4,BJ44, BJ45,BJ46,BJ5,BJ6,C2,C48,D1, D49,E1,E49,F1,F49A6VSS_NCTF_6#A6VSS_NCTF_24#BJ6 VSS_NCTF_25#C2 VSS_NCTF_26#C48 VSS_NCTF_27#D1 VSS_NCTF_28#D49 VSS_NCTF_29#E1 VSS_NCTF_30#E49 VSS_NCTF_31#F1 VSS_NCTF_32#F49BB3D3V_PCH_DS3 RN2206BD49 BE1 4 3USB3_PW R_ON PCH_GPIO121 22Integrated Clock Chip Enable(Reserved) ICC_EN# (GPIO8) HIGH- DISABLED [DEFAULT] LOW ENABLEDBE49 BF1 BF49SRN10KJ-11-GP-U1 RKR1J-GPPCH_GPIO15PLL_ODVR_ENPLL ON DIE VR ENABLE HIGH- DISABLED [DEFAULT]23D3V_S5R2212 Do Not StuffPLL_ODVR_EN (GPIO28)DYR2213LOW -ENABLEDA1 2 10KR1J-GPPCH_GPIO27 STORMA1Wistron Corporation21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C. Title Size A3 Date:5 4 3 2Document Number Monday, June 25, 2012 Sheet1Rev 22 of 102543211D05V_VTTPCH1GPOWERCRT7 OF 1063mA3D3V_S01.7ASC1U6D3V2KX-L-1-GP C2302 SC1U6D3V2KX-L-1-GP C SC1U6D3V2KX-L-1-GP C2304 SC10U6D3V2MX-GP-U C2301DAA23 AC23 AD21 AD23 AF21 AF23 AG21 AG23 AG24 AG26 AG27 AG29 AJ23 AJ26 AJ27 AJ29 AJ31VCCCORE1 VCCCORE2 VCCCORE3 VCCCORE4 VCCCORE5 VCCCORE6 VCCCORE7 VCCCORE8 VCCCORE9 VCCCORE10 VCCCORE11 VCCCORE12 VCCCORE13 VCCCORE14 VCCCORE15 VCCCORE16 VCCCORE17VCCADAC VSSADACU48 U471111DVCC CORE2222VCCALVDS VSSALVDSAK36 AK37 AM37 AM38 AP36 AP37LVDSVCCTX_LVDS1 VCCTX_LVDS2 VCCTX_LVDS3Disable LVDS3.711A(Total)1D05V_VTT 1D05V_VTTAN19 BJ22VCCTX_LVDS4 VCCIO28 VCCAPLLEXP VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCDMI1 VCCVRM3AN16SC1U6D3V2KX-L-1-GP C SC1U6D3V2KX-L-1-GP C2307 SC1U6D3V2KX-L-1-GP C SC1U6D3V2KX-L-1-GP C2309HVCMOS3.711A(Total)1 1 1 1 AN17 AN21 AN26 AN27 AP21 AP23 AP24 AP26 AT24 AN333D3V_S0VCC3_3_6V33228mA(Total)3D3V_S0VCC3_3_7V34 1C2315 SCD1U10V1KX-GPC222C221D5V_S0167mA(Total)AT16