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项目语言:C
权限:read-only(如需更高权限请先加入项目)
Index: imx-common/speed.c
===================================================================
--- imx-common/speed.c (revision 0)
+++ imx-common/speed.c (revision 7)
@@ -0,0 +1,45 @@
+ * (C) Copyright
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ * Copyright (C)
Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.)
+ * SPDX-License-Identifier: GPL-2.0+
+#include &common.h&
+#include &asm/arch/imx-regs.h&
+#include &asm/arch/clock.h&
+#ifdef CONFIG_FSL_ESDHC
+DECLARE_GLOBAL_DATA_PTR;
+int get_clocks(void)
+#ifdef CONFIG_FSL_ESDHC
+#ifdef CONFIG_FSL_USDHC
+#if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC2_BASE_ADDR
+ gd-&arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+#elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC3_BASE_ADDR
+ gd-&arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+#elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC4_BASE_ADDR
+ gd-&arch.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
+ gd-&arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+#if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR
+ gd-&arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK);
+#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR
+ gd-&arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
+#elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC4_BASE_ADDR
+ gd-&arch.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
+ gd-&arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
+ return 0;
Property changes on: imx-common/speed.c
___________________________________________________________________
Added: svn:executable
## -0,0 +1 ##
\ No newline at end of property
Index: imx-common/timer.c
===================================================================
--- imx-common/timer.c (revision 0)
+++ imx-common/timer.c (revision 7)
@@ -0,0 +1,121 @@
+ * (C) Copyright 2007
+ * Sascha Hauer, Pengutronix
+ * (C) Copyright 2009 Freescale Semiconductor, Inc.
+ * SPDX-License-Identifier: GPL-2.0+
+#include &common.h&
+#include &asm/io.h&
+#include &div64.h&
+#include &asm/arch/imx-regs.h&
+#include &asm/arch/clock.h&
+/* General purpose timers registers */
+struct mxc_gpt {
+ unsigned int nouse[6];
+static struct mxc_gpt *cur_gpt = (struct mxc_gpt *)GPT1_BASE_ADDR;
+/* General purpose timers bitfields */
+#define GPTCR_SWR
(1 && 15) /* Software reset */
+#define GPTCR_FRR
(1 && 9) /* Freerun / restart */
+#define GPTCR_CLKSOURCE_32 (4 && 6) /* Clock source */
+#define GPTCR_TEN
/* Timer enable */
+DECLARE_GLOBAL_DATA_PTR;
+static inline unsigned long long tick_to_time(unsigned long long tick)
+ tick *= CONFIG_SYS_HZ;
+ do_div(tick, MXC_CLK32);
+static inline unsigned long long us_to_tick(unsigned long long usec)
+ usec = usec * MXC_CLK32 + 999999;
+ do_div(usec, 1000000);
+int timer_init(void)
+ /* setup GP Timer 1 */
+ __raw_writel(GPTCR_SWR, &cur_gpt-&control);
+ /* We have no udelay by now */
+ for (i = 0; i & 100; i++)
__raw_writel(0, &cur_gpt-&control);
+ __raw_writel(0, &cur_gpt-&prescaler); /* 32Khz */
+ /* Freerun Mode, PERCLK1 input */
+ i = __raw_readl(&cur_gpt-&control);
+ __raw_writel(i | GPTCR_CLKSOURCE_32 | GPTCR_TEN, &cur_gpt-&control);
+ gd-&arch.tbl = __raw_readl(&cur_gpt-&counter);
+ gd-&arch.tbu = 0;
+ return 0;
+unsigned long long get_ticks(void)
+ ulong now = __raw_readl(&cur_gpt-&counter); /* current tick value */
+ /* increment tbu if tbl has rolled over */
+ if (now & gd-&arch.tbl)
gd-&arch.tbu++;
+ gd-&arch.tbl =
+ return (((unsigned long long)gd-&arch.tbu) && 32) | gd-&arch.
+ulong get_timer_masked(void)
* get_ticks() returns a long long (64 bit), it wraps in
* 2^64 / MXC_CLK32 = 2^64 / 2^15 = 2^49 ~ 5 * 10^14 (s) ~
* 5 * 10^9 days... and get_ticks() * CONFIG_SYS_HZ wraps in
* 5 * 10^6 days - long enough.
+ return tick_to_time(get_ticks());
+ulong get_timer(ulong base)
+ return get_timer_masked() -
+/* delay x useconds AND preserve advance timstamp value */
+void __udelay(unsigned long usec)
+ tmo = us_to_tick(usec);
+ tmp = get_ticks() + /* get current timestamp */
+ while (get_ticks() & tmp) /* loop till event */
+ * This function is derived from PowerPC code (timebase clock frequency).
+ * On ARM it returns the number of timer ticks per second.
+ulong get_tbclk(void)
+ return MXC_CLK32;
Property changes on: imx-common/timer.c
___________________________________________________________________
Added: svn:executable
## -0,0 +1 ##
\ No newline at end of property
Index: imx-common/cmd_hdmidet.c
===================================================================
--- imx-common/cmd_hdmidet.c (revision 0)
+++ imx-common/cmd_hdmidet.c (revision 7)
@@ -0,0 +1,20 @@
+ * Copyright (C) 2012 Boundary Devices Inc.
+ * SPDX-License-Identifier: GPL-2.0+
+#include &common.h&
+#include &asm/arch/imx-regs.h&
+#include &asm/arch/mxc_hdmi.h&
+#include &asm/io.h&
+static int do_hdmidet(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+ struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR;
+ return (readb(&hdmi-&phy_stat0) & HDMI_DVI_STAT) ? 0 : 1;
+U_BOOT_CMD(hdmidet, 1, 1, do_hdmidet,
+ &detect HDMI monitor&,
Property changes on: imx-common/cmd_hdmidet.c
___________________________________________________________________
Added: svn:executable
## -0,0 +1 ##
\ No newline at end of property
Index: imx-common/cpu.c
===================================================================
--- imx-common/cpu.c (revision 0)
+++ imx-common/cpu.c (revision 7)
@@ -0,0 +1,182 @@
+ * (C) Copyright 2007
+ * Sascha Hauer, Pengutronix
+ * (C) Copyright 2009 Freescale Semiconductor, Inc.
+ * SPDX-License-Identifier: GPL-2.0+
+#include &common.h&
+#include &asm/errno.h&
+#include &asm/io.h&
+#include &asm/arch/imx-regs.h&
+#include &asm/arch/clock.h&
+#include &asm/arch/sys_proto.h&
+#include &asm/arch/crm_regs.h&
+#include &ipu_pixfmt.h&
+#ifdef CONFIG_FSL_ESDHC
+#include &fsl_esdhc.h&
+char *get_reset_cause(void)
+ struct src *src_regs = (struct src *)SRC_BASE_ADDR;
+ cause = readl(&src_regs-&srsr);
+ writel(cause, &src_regs-&srsr);
+ switch (cause) {
+ case 0x00001:
+ case 0x00011:
return &POR&;
+ case 0x00004:
return &CSU&;
+ case 0x00008:
return &IPP USER&;
+ case 0x00010:
return &WDOG&;
+ case 0x00020:
return &JTAG HIGH-Z&;
+ case 0x00040:
return &JTAG SW&;
+ case 0x10000:
return &WARM BOOT&;
+ default:
return &unknown reset&;
+#if defined(CONFIG_MX53) || defined(CONFIG_MX6)
+#if defined(CONFIG_MX53)
+#define MEMCTL_BASE ESDCTL_BASE_ADDR
+#define MEMCTL_BASE MMDC_P0_BASE_ADDR
+static const unsigned char col_lookup[] = {9, 10, 11, 8, 12, 9, 9, 9};
+static const unsigned char bank_lookup[] = {3, 2};
+struct esd_mmdc_regs {
+ uint32_t
+ uint32_t
+ uint32_t
+ uint32_t cfg0;
+ uint32_t cfg1;
+ uint32_t cfg2;
+ uint32_t
+ uint32_t
+ uint32_t
+ uint32_t rsvd1;
+ uint32_t rsvd2;
+ uint32_t
+ uint32_t
+ uint32_t
+ uint32_t cfg3
+ uint32_t mr4;
+#define ESD_MMDC_CTL_GET_ROW(mdctl) ((ctl && 24) & 7)
+#define ESD_MMDC_CTL_GET_COLUMN(mdctl) ((ctl && 20) & 7)
+#define ESD_MMDC_CTL_GET_WIDTH(mdctl) ((ctl && 16) & 3)
+#define ESD_MMDC_CTL_GET_CS1(mdctl) ((ctl && 30) & 1)
+#define ESD_MMDC_MISC_GET_BANK(mdmisc) ((misc && 5) & 1)
+unsigned imx_ddr_size(void)
+ struct esd_mmdc_regs *mem = (struct esd_mmdc_regs *)MEMCTL_BASE;
+ unsigned ctl = readl(&mem-&ctl);
+ unsigned misc = readl(&mem-&misc);
+ int bits = 11 + 0 + 0 + 1;
/* row + col + bank + width */
+ bits += ESD_MMDC_CTL_GET_ROW(ctl);
+ bits += col_lookup[ESD_MMDC_CTL_GET_COLUMN(ctl)];
+ bits += bank_lookup[ESD_MMDC_MISC_GET_BANK(misc)];
+ bits += ESD_MMDC_CTL_GET_WIDTH(ctl);
+ bits += ESD_MMDC_CTL_GET_CS1(ctl);
+ return 1 &&
+#if defined(CONFIG_DISPLAY_CPUINFO)
+const char *get_imx_type(u32 imxtype)
+ switch (imxtype) {
+ case MXC_CPU_MX6Q:
return &6Q&; /* Quad-core version of the mx6 */
+ case MXC_CPU_MX6D:
return &6D&; /* Dual-core version of the mx6 */
+ case MXC_CPU_MX6DL:
return &6DL&; /* Dual Lite version of the mx6 */
+ case MXC_CPU_MX6SOLO:
return &6SOLO&; /* Solo version of the mx6 */
+ case MXC_CPU_MX6SL:
return &6SL&; /* Solo-Lite version of the mx6 */
+ case MXC_CPU_MX51:
return &51&;
+ case MXC_CPU_MX53:
return &53&;
+ default:
return &??&;
+int print_cpuinfo(void)
+ cpurev = get_cpu_rev();
+ printf(&CPU:
Freescale i.MX%s rev%d.%d at %d MHz\n&,
get_imx_type((cpurev & 0xFF000) && 12),
(cpurev & 0x000F0) && 4,
(cpurev & 0x0000F) && 0,
mxc_get_clock(MXC_ARM_CLK) / 1000000);
+ printf(&Reset cause: %s\n&, get_reset_cause());
+ return 0;
+int cpu_eth_init(bd_t *bis)
+ int rc = -ENODEV;
+#if defined(CONFIG_FEC_MXC)
+ rc = fecmxc_initialize(bis);
+#ifdef CONFIG_FSL_ESDHC
+ * Initializes on-chip MMC controllers.
+ * to override, implement board_mmc_init()
+int cpu_mmc_init(bd_t *bis)
+ return fsl_esdhc_mmc_init(bis);
+u32 get_ahb_clk(void)
+ struct mxc_ccm_reg *imx_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+ u32 reg, ahb_
+ reg = __raw_readl(&imx_ccm-&cbcdr);
+ reg &= MXC_CCM_CBCDR_AHB_PODF_MASK;
+ ahb_podf = reg && MXC_CCM_CBCDR_AHB_PODF_OFFSET;
+ return get_periph_clk() / (ahb_podf + 1);
+#if defined(CONFIG_VIDEO_IPUV3)
+void arch_preboot_os(void)
+ /* disable video before launching O/S */
+ ipuv3_fb_shutdown();
Property changes on: imx-common/cpu.c
___________________________________________________________________
Added: svn:executable
## -0,0 +1 ##
\ No newline at end of property
Index: imx-common/iomux-v3.c
===================================================================
--- imx-common/iomux-v3.c (revision 0)
+++ imx-common/iomux-v3.c (revision 7)
@@ -0,0 +1,57 @@
+ * Based on the iomux-v3.c from Linux kernel:
+ * Copyright (C) 2008 by Sascha Hauer &kernel@pengutronix.de&
+ * Copyright (C) 2009 by Jan Weitzel Phytec Messtechnik GmbH,
&armlinux@phytec.de&
+ * Copyright (C)
Freescale Semiconductor, Inc.
+ * SPDX-License-Identifier: GPL-2.0+
+#include &common.h&
+#include &asm/io.h&
+#include &asm/arch/imx-regs.h&
+#include &asm/imx-common/iomux-v3.h&
+static void *base = (void *)IOMUXC_BASE_ADDR;
+ * configures a single pad in the iomuxer
+void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad)
+ u32 mux_ctrl_ofs = (pad & MUX_CTRL_OFS_MASK) && MUX_CTRL_OFS_SHIFT;
+ u32 mux_mode = (pad & MUX_MODE_MASK) && MUX_MODE_SHIFT;
+ u32 sel_input_ofs =
(pad & MUX_SEL_INPUT_OFS_MASK) && MUX_SEL_INPUT_OFS_SHIFT;
+ u32 sel_input =
(pad & MUX_SEL_INPUT_MASK) && MUX_SEL_INPUT_SHIFT;
+ u32 pad_ctrl_ofs =
(pad & MUX_PAD_CTRL_OFS_MASK) && MUX_PAD_CTRL_OFS_SHIFT;
+ u32 pad_ctrl = (pad & MUX_PAD_CTRL_MASK) && MUX_PAD_CTRL_SHIFT;
+ if (mux_ctrl_ofs)
__raw_writel(mux_mode, base + mux_ctrl_ofs);
+ if (sel_input_ofs)
__raw_writel(sel_input, base + sel_input_ofs);
+#ifdef CONFIG_IOMUX_SHARE_CONF_REG
+ if (!(pad_ctrl & NO_PAD_CTRL))
__raw_writel((mux_mode && PAD_MUX_MODE_SHIFT) | pad_ctrl,
base + pad_ctrl_ofs);
+ if (!(pad_ctrl & NO_PAD_CTRL) && pad_ctrl_ofs)
__raw_writel(pad_ctrl, base + pad_ctrl_ofs);
+void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list,
unsigned count)
+ iomux_v3_cfg_t const *p = pad_
+ for (i = 0; i & i++)
imx_iomux_v3_setup_pad(*p++);
Property changes on: imx-common/iomux-v3.c
___________________________________________________________________
Added: svn:executable
## -0,0 +1 ##
\ No newline at end of property
Index: imx-common/sata.c
===================================================================
--- imx-common/sata.c (revision 0)
+++ imx-common/sata.c (revision 7)
@@ -0,0 +1,34 @@
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ * SPDX-License-Identifier: GPL-2.0+
+#include &asm/imx-common/iomux-v3.h&
+#include &asm/arch/iomux.h&
+#include &asm/io.h&
+#include &asm/arch/clock.h&
+int setup_sata(void)
+ struct iomuxc_base_regs *const iomuxc_regs
= (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR;
+ int ret = enable_sata_clock();
+ if (ret)
+ clrsetbits_le32(&iomuxc_regs-&gpr[13],
IOMUXC_GPR13_SATA_MASK,
IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
|IOMUXC_GPR13_SATA_PHY_7_SATA2M
|IOMUXC_GPR13_SATA_SPEED_3G
|(3&&IOMUXC_GPR13_SATA_PHY_6_SHIFT)
|IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
|IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
|IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
|IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
|IOMUXC_GPR13_SATA_PHY_1_SLOW);
+ return 0;
Property changes on: imx-common/sata.c
___________________________________________________________________
Added: svn:executable
## -0,0 +1 ##
\ No newline at end of property
Index: imx-common/cmd_bmode.c
===================================================================
--- imx-common/cmd_bmode.c (revision 0)
+++ imx-common/cmd_bmode.c (revision 7)
@@ -0,0 +1,106 @@
+ * Copyright (C) 2012 Boundary Devices Inc.
+ * SPDX-License-Identifier: GPL-2.0+
+#include &common.h&
+#include &asm/errno.h&
+#include &asm/io.h&
+#include &asm/imx-common/boot_mode.h&
+#include &malloc.h&
+#include &command.h&
+static const struct boot_mode *modes[2];
+static const struct boot_mode *search_modes(char *arg)
+ for (i = 0; i & ARRAY_SIZE(modes); i++) {
const struct boot_mode *p = modes[i];
while (p-&name) {
if (!strcmp(p-&name, arg))
+ return NULL;
+static int create_usage(char *dest)
+ int size = 0;
+ for (i = 0; i & ARRAY_SIZE(modes); i++) {
const struct boot_mode *p = modes[i];
while (p-&name) {
int len = strlen(p-&name);
if (dest) {
memcpy(dest, p-&name, len);
*dest++ = '|';
size += len + 1;
+ if (dest)
memcpy(dest - 1, & [noreset]&, 11); /* include trailing 0 */
+ size += 10;
+static int do_boot_mode(cmd_tbl_t *cmdtp, int flag, int argc,
char * const argv[])
+ const struct boot_mode *p;
+ int reset_requested = 1;
+ if (argc & 2)
return CMD_RET_USAGE;
+ p = search_modes(argv[1]);
return CMD_RET_USAGE;
+ if (argc == 3) {
if (strcmp(argv[2], &noreset&))
return CMD_RET_USAGE;
reset_requested = 0;
+ boot_mode_apply(p-&cfg_val);
+ if (reset_requested && p-&cfg_val)
do_reset(NULL, 0, 0, NULL);
+ return 0;
+U_BOOT_CMD(
+ bmode, 3, 0, do_boot_mode,
+void add_board_boot_modes(const struct boot_mode *p)
+ cmd_tbl_t *entry = ll_entry_get(cmd_tbl_t, bmode, cmd);
+ if (entry-&usage) {
free(entry-&usage);
entry-&usage = NULL;
+ modes[0] =
+ modes[1] = soc_boot_
+ size = create_usage(NULL);
+ dest = malloc(size);
+ if (dest) {
create_usage(dest);
entry-&usage =
Property changes on: imx-common/cmd_bmode.c
___________________________________________________________________
Added: svn:executable
## -0,0 +1 ##
\ No newline at end of property
Index: imx-common/misc.c
===================================================================
--- imx-common/misc.c (revision 0)
+++ imx-common/misc.c (revision 7)
@@ -0,0 +1,73 @@
+ * Copyright 2013 Stefan Roese &sr@denx.de&
+ * SPDX-License-Identifier: GPL-2.0+
+#include &common.h&
+#include &asm/errno.h&
+#include &asm/io.h&
+#include &asm/imx-common/regs-common.h&
+/* 1 second delay should be plenty of time for block reset. */
+#define RESET_MAX_TIMEOUT 1000000
+#define MXS_BLOCK_SFTRST (1 && 31)
+#define MXS_BLOCK_CLKGATE (1 && 30)
+int mxs_wait_mask_set(struct mxs_register_32 *reg, uint32_t mask, unsigned
int timeout)
+ while (--timeout) {
if ((readl(&reg-&reg) & mask) == mask)
udelay(1);
+ return !
+int mxs_wait_mask_clr(struct mxs_register_32 *reg, uint32_t mask, unsigned
int timeout)
+ while (--timeout) {
if ((readl(&reg-&reg) & mask) == 0)
udelay(1);
+ return !
+int mxs_reset_block(struct mxs_register_32 *reg)
+ /* Clear SFTRST */
+ writel(MXS_BLOCK_SFTRST, &reg-&reg_clr);
+ if (mxs_wait_mask_clr(reg, MXS_BLOCK_SFTRST, RESET_MAX_TIMEOUT))
+ /* Clear CLKGATE */
+ writel(MXS_BLOCK_CLKGATE, &reg-&reg_clr);
+ /* Set SFTRST */
+ writel(MXS_BLOCK_SFTRST, &reg-&reg_set);
+ /* Wait for CLKGATE being set */
+ if (mxs_wait_mask_set(reg, MXS_BLOCK_CLKGATE, RESET_MAX_TIMEOUT))
+ /* Clear SFTRST */
+ writel(MXS_BLOCK_SFTRST, &reg-&reg_clr);
+ if (mxs_wait_mask_clr(reg, MXS_BLOCK_SFTRST, RESET_MAX_TIMEOUT))
+ /* Clear CLKGATE */
+ writel(MXS_BLOCK_CLKGATE, &reg-&reg_clr);
+ if (mxs_wait_mask_clr(reg, MXS_BLOCK_CLKGATE, RESET_MAX_TIMEOUT))
+ return 0;
Property changes on: imx-common/misc.c
___________________________________________________________________
Added: svn:executable
## -0,0 +1 ##
\ No newline at end of property
Index: imx-common/Makefile
===================================================================
--- imx-common/Makefile (revision 0)
+++ imx-common/Makefile (revision 7)
@@ -0,0 +1,84 @@
+# (C) Copyright
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+# (C) Copyright 2011 Freescale Semiconductor, Inc.
+# SPDX-License-Identifier: GPL-2.0+
+ifeq ($(SOC),$(filter $(SOC),mx25 mx35 mx5 mx6 vf610))
+obj-y = iomux-v3.o
+ifeq ($(SOC),$(filter $(SOC),mx5 mx6))
+obj-y += timer.o cpu.o speed.o
+obj-$(CONFIG_SYS_I2C_MXC) += i2c-mxv7.o
+ifeq ($(SOC),$(filter $(SOC),mx6 mxs))
+obj-y += misc.o
+ifeq ($(SOC),$(filter $(SOC),mx6))
+obj-$(CONFIG_CMD_SATA) += sata.o
+obj-$(CONFIG_CMD_BMODE) += cmd_bmode.o
+obj-$(CONFIG_CMD_HDMIDETECT) += cmd_hdmidet.o
+quiet_cmd_cpp_cfg = CFGS
cmd_cpp_cfg = $(CPP) $(cpp_flags) -x c -o $@ $&
+IMX_CONFIG = $(CONFIG_IMX_CONFIG:&%&=%).cfgtmp
+$(IMX_CONFIG): %.cfgtmp: % FORCE
+ $(Q)mkdir -p $(dir $@)
+ $(call if_changed_dep,cpp_cfg)
+quiet_cmd_mkimage = MKIMAGE $@
+cmd_mkimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -d $& $@ \
+ $(if $(KBUILD_VERBOSE:1=), &/dev/null)
+MKIMAGEFLAGS_u-boot.imx = -n $(filter-out $& $(PHONY),$^) -T imximage \
+ -e $(CONFIG_SYS_TEXT_BASE)
+u-boot.imx: u-boot.bin $(IMX_CONFIG) FORCE
+ $(call if_changed,mkimage)
+ifeq ($(CONFIG_OF_SEPARATE),y)
+MKIMAGEFLAGS_u-boot-dtb.imx = -n $(filter-out $& $(PHONY),$^) -T imximage \
+ -e $(CONFIG_SYS_TEXT_BASE)
+u-boot-dtb.imx: u-boot-dtb.bin $(IMX_CONFIG) FORCE
+ $(call if_changed,mkimage)
+MKIMAGEFLAGS_SPL = -n $(filter-out $& $(PHONY),$^) -T imximage \
+ -e $(CONFIG_SPL_TEXT_BASE)
+SPL: spl/u-boot-spl.bin $(IMX_CONFIG) FORCE
+ $(call if_changed,mkimage)
+MKIMAGEFLAGS_u-boot.uim = -A arm -O U-Boot -a $(CONFIG_SYS_TEXT_BASE) \
-e $(CONFIG_SYS_TEXT_BASE) -C none
+u-boot.uim: u-boot.bin FORCE
+ $(call if_changed,mkimage)
+OBJCOPYFLAGS += -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO)
+append = cat $(filter-out $& $(PHONY), $^) && $@
+quiet_cmd_pad_cat = CAT
+cmd_pad_cat = $(cmd_objcopy) && $(append) || rm -f $@
+u-boot-with-spl.imx: SPL u-boot.uim FORCE
+ $(call if_changed,pad_cat)
+u-boot-with-nand-spl.imx: spl/u-boot-nand-spl.imx u-boot.uim FORCE
+ $(call if_changed,pad_cat)
+quiet_cmd_u-boot-nand-spl_imx = GEN
+cmd_u-boot-nand-spl_imx = (echo -ne '\x00\x00\x00\x00\x46\x43\x42\x20\x01' && \
+ dd bs=1015 count=1 if=/dev/zero 2&/dev/null) | cat - $& & $@
+spl/u-boot-nand-spl.imx: SPL FORCE
+ $(call if_changed,u-boot-nand-spl_imx)
+targets += $(addprefix ../../../,$(IMX_CONFIG) SPL u-boot.uim spl/u-boot-nand-spl.imx)
Property changes on: imx-common/Makefile
___________________________________________________________________
Added: svn:executable
## -0,0 +1 ##
\ No newline at end of property
Index: imx-common/i2c-mxv7.c
===================================================================
--- imx-common/i2c-mxv7.c (revision 0)
+++ imx-common/i2c-mxv7.c (revision 7)
@@ -0,0 +1,83 @@
+ * Copyright (C) 2012 Boundary Devices Inc.
+ * SPDX-License-Identifier: GPL-2.0+
+#include &common.h&
+#include &asm/arch/clock.h&
+#include &asm/arch/imx-regs.h&
+#include &asm/errno.h&
+#include &asm/gpio.h&
+#include &asm/imx-common/mxc_i2c.h&
+#include &watchdog.h&
+static int force_idle_bus(void *priv)
+ int sda,
+ ulong elapsed, start_
+ struct i2c_pads_info *p = (struct i2c_pads_info *)
+ int ret = 0;
+ gpio_direction_input(p-&sda.gp);
+ gpio_direction_input(p-&scl.gp);
+ imx_iomux_v3_setup_pad(p-&sda.gpio_mode);
+ imx_iomux_v3_setup_pad(p-&scl.gpio_mode);
+ sda = gpio_get_value(p-&sda.gp);
+ scl = gpio_get_value(p-&scl.gp);
+ if ((sda & scl) == 1)
/* Bus is idle already */
+ printf(&%s: sda=%d scl=%d sda.gp=0x%x scl.gp=0x%x\n&, __func__,
sda, scl, p-&sda.gp, p-&scl.gp);
+ /* Send high and low on the SCL line */
+ for (i = 0; i & 9; i++) {
gpio_direction_output(p-&scl.gp, 0);
udelay(50);
gpio_direction_input(p-&scl.gp);
udelay(50);
+ start_time = get_timer(0);
+ for (;;) {
sda = gpio_get_value(p-&sda.gp);
scl = gpio_get_value(p-&scl.gp);
if ((sda & scl) == 1)
WATCHDOG_RESET();
elapsed = get_timer(start_time);
if (elapsed & (CONFIG_SYS_HZ / 5)) { /* .2 seconds */
ret = -EBUSY;
printf(&%s: failed to clear bus, sda=%d scl=%d\n&,
__func__, sda, scl);
+ imx_iomux_v3_setup_pad(p-&sda.i2c_mode);
+ imx_iomux_v3_setup_pad(p-&scl.i2c_mode);
+static void * const i2c_bases[] = {
+ (void *)I2C1_BASE_ADDR,
+ (void *)I2C2_BASE_ADDR,
+#ifdef I2C3_BASE_ADDR
+ (void *)I2C3_BASE_ADDR,
+/* i2c_index can be from 0 - 2 */
+void setup_i2c(unsigned i2c_index, int speed, int slave_addr,
struct i2c_pads_info *p)
+ if (i2c_index &= ARRAY_SIZE(i2c_bases))
+ /* Enable i2c clock */
+ enable_i2c_clk(1, i2c_index);
+ /* Make sure bus is idle */
+ force_idle_bus(p);
+ bus_i2c_init(i2c_bases[i2c_index], speed, slave_addr,
force_idle_bus, p);
Property changes on: imx-common/i2c-mxv7.c
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Added: svn:executable
## -0,0 +1 ##
\ No newline at end of property
Index: include/asm/byteorder.h
===================================================================
--- include/asm/byteorder.h (revision 0)
+++ include/asm/byteorder.h (revision 7)
@@ -0,0 +1,32 @@
linux/include/asm-arm/byteorder.h
+ * ARM Endian-ness.
In little endian mode, the data bus is connected such
+ * that byte accesses appear as:
0 = d0...d7, 1 = d8...d15, 2 = d16...d23, 3 = d24...d31
+ * and word accesses (data or instruction) appear as:
+ * When in big endian mode, byte accesses appear as:
0 = d24...d31, 1 = d16...d23, 2 = d8...d15, 3 = d0...d7
+ * and word accesses (data or instruction) appear as:
+#ifndef __ASM_ARM_BYTEORDER_H
+#define __ASM_ARM_BYTEORDER_H
+#include &asm/types.h&
+#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
define __BYTEORDER_HAS_U64__
define __SWAB_64_THRU_32__
+#if defined(__ARMEB__) || defined(__AARCH64EB__)
+#include &linux/byteorder/big_endian.h&
+#include &linux/byteorder/little_endian.h&
Property changes on: include/asm/byteorder.h
___________________________________________________________________
Added: svn:executable
## -0,0 +1 ##
\ No newline at end of property
Index: include/asm/bitops.h
===================================================================
--- include/asm/bitops.h (revision 0)
+++ include/asm/bitops.h (revision 7)
@@ -0,0 +1,156 @@
+ * Copyright 1995, Russell King.
+ * Various bits and pieces copyrights include:
Linus Torvalds (test_bit).
+ * bit 0 is the LSB bit 32 is the LSB of (addr+1).
+ * Please note that the code in this file should never be included
+ * from user space.
Many of these are not implemented in assembler
+ * since they would be too costly.
Also, they require priviledged
+ * instructions (which are not available from user mode) to ensure
+ * that they are atomic.
+#ifndef __ASM_ARM_BITOPS_H
+#define __ASM_ARM_BITOPS_H
+#ifdef __KERNEL__
+#include &asm/proc/system.h&
+#define smp_mb__before_clear_bit() do { } while (0)
+#define smp_mb__after_clear_bit() do { } while (0)
+ * Function prototypes to keep gcc -Wall happy.
+extern void set_bit(int nr, volatile void * addr);
+extern void clear_bit(int nr, volatile void * addr);
+extern void change_bit(int nr, volatile void * addr);
+static inline void __change_bit(int nr, volatile void *addr)
+ unsigned long mask = BIT_MASK(nr);
+ unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+static inline int __test_and_set_bit(int nr, volatile void *addr)
+ unsigned long mask = BIT_MASK(nr);
+ unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+ unsigned long old = *p;
+ *p = old |
+ return (old & mask) != 0;
+static inline int test_and_set_bit(int nr, volatile void * addr)
+ local_irq_save(flags);
+ out = __test_and_set_bit(nr, addr);
+ local_irq_restore(flags);
+static inline int __test_and_clear_bit(int nr, volatile void *addr)
+ unsigned long mask = BIT_MASK(nr);
+ unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+ unsigned long old = *p;
+ *p = old & ~
+ return (old & mask) != 0;
+static inline int test_and_clear_bit(int nr, volatile void * addr)
+ local_irq_save(flags);
+ out = __test_and_clear_bit(nr, addr);
+ local_irq_restore(flags);
+extern int test_and_change_bit(int nr, volatile void * addr);
+static inline int __test_and_change_bit(int nr, volatile void *addr)
+ unsigned long mask = BIT_MASK(nr);
+ unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
+ unsigned long old = *p;
+ *p = old ^
+ return (old & mask) != 0;
+extern int find_first_zero_bit(void * addr, unsigned size);
+extern int find_next_zero_bit(void * addr, int size, int offset);
+ * This routine doesn't need to be atomic.
+static inline int test_bit(int nr, const void * addr)
return ((unsigned char *) addr)[nr && 3] & (1U && (nr & 7));
+static inline int __ilog2(unsigned int x)
+ return generic_fls(x) - 1;
+ * ffz = Find First Zero in word. Undefined if no zero exists,
+ * so code should check against ~0UL first..
+static inline unsigned long ffz(unsigned long word)
+ word = ~
+ if (word & 0x0000ffff) { k -= 16; word &&= 16; }
+ if (word & 0x00ff0000) { k -= 8;
word &&= 8;
+ if (word & 0x0f000000) { k -= 4;
word &&= 4;
+ if (word & 0x) { k -= 2;
word &&= 2;
+ if (word & 0x) { k -= 1; }
+ * hweightN: returns the hamming weight (i.e. the number
+ * of bits set) of a N-bit word
+#define hweight32(x) generic_hweight32(x)
+#define hweight16(x) generic_hweight16(x)
+#define hweight8(x) generic_hweight8(x)
+#define ext2_set_bit
test_and_set_bit
+#define ext2_clear_bit
test_and_clear_bit
+#define ext2_test_bit
+#define ext2_find_first_zero_bit find_first_zero_bit
+#define ext2_find_next_zero_bit
find_next_zero_bit
+/* Bitmap functions for the minix filesystem. */
+#define minix_test_and_set_bit(nr,addr) test_and_set_bit(nr,addr)
+#define minix_set_bit(nr,addr)
set_bit(nr,addr)
+#define minix_test_and_clear_bit(nr,addr) test_and_clear_bit(nr,addr)
+#define minix_test_bit(nr,addr)
test_bit(nr,addr)
+#define minix_find_first_zero_bit(addr,size) find_first_zero_bit(addr,size)
+#endif /* __KERNEL__ */
+#endif /* _ARM_BITOPS_H */
Property changes on: include/asm/bitops.h
___________________________________________________________________
Added: svn:executable
## -0,0 +1 ##
\ No newline at end of property
Index: include/asm/setup.h
===================================================================
--- include/asm/setup.h (revision 0)
+++ include/asm/setup.h (revision 7)
@@ -0,0 +1,274 @@
linux/include/asm/setup.h
Copyright (C)
Russell King
+ * This prog you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
Structure passed to kernel to tell it about the
hardware it's running on.
See linux/Documentation/arm/Setup
for more info.
This file contains two ways to pass information from the boot
loader to the kernel. The old struct param_struct is deprecated,
but it will be kept in the kernel for 5 years from now
(2001). This will allow boot loaders to convert to the new struct
+#ifndef __ASMARM_SETUP_H
+#define __ASMARM_SETUP_H
+ * Usage:
- do not go blindly adding fields, add them at the end
- when adding fields, don't rely on the address until
a patch from me has been released
- unused fields should be zero (for future expansion)
- this structure is relatively short-lived - only
guaranteed to contain useful data in setup_arch()
+#define COMMAND_LINE_SIZE 1024
+/* This is the old deprecated way to pass parameters to the kernel */
+struct param_struct {
+ struct {
unsigned long page_
unsigned long nr_
unsigned long ramdisk_
+#define FLAG_READONLY 1
+#define FLAG_RDLOAD 4
+#define FLAG_RDPROMPT 8
unsigned long video_num_ /* 20 */
unsigned long video_num_ /* 24 */
unsigned long video_x;
unsigned long video_y;
unsigned long memc_control_ /* 36 */
unsigned char bytes_per_char_h; /* 42 */
unsigned char bytes_per_char_v; /* 43 */
unsigned long pages_in_bank[4]; /* 44 */
unsigned long pages_in_ /* 60 */
unsigned long initrd_
unsigned long initrd_
unsigned long rd_
unsigned long system_
unsigned long system_serial_ /* 80 */
unsigned long system_serial_ /* 84 */
unsigned long mem_fclk_21285;
+ char unused[256];
+ char paths[8][128];
+ struct {
char n[1024 - sizeof(unsigned long)];
char commandline[COMMAND_LINE_SIZE];
+ * The new way of passing information: a list of tagged entries
+/* The list ends with an ATAG_NONE node. */
+#define ATAG_NONE 0x
+struct tag_header {
+/* The list must start with an ATAG_CORE node */
+#define ATAG_CORE 0x
+struct tag_core {
/* bit 0 = read-only */
+/* it is allowed to have multiple ATAG_MEM nodes */
+#define ATAG_MEM 0x
+struct tag_mem32 {
/* physical start address */
+/* VGA text type displays */
+#define ATAG_VIDEOTEXT 0x
+struct tag_videotext {
video_ega_
+/* describes how the ramdisk will be used in kernel */
+#define ATAG_RAMDISK 0x
+struct tag_ramdisk {
+ u32 /* bit 0 = load, bit 1 = prompt */
+ u32 /* decompressed ramdisk size in _kilo_ bytes */
+ u32 /* starting block of floppy-based RAM disk image */
+/* describes where the compressed ramdisk image lives (virtual address) */
+ * this one accidentally used virtual addresses - as such,
+ * its depreciated.
+#define ATAG_INITRD 0x
+/* describes where the compressed ramdisk image lives (physical address) */
+#define ATAG_INITRD2 0x
+struct tag_initrd {
+ u32 /* physical start address */
+ u32 /* size of compressed ramdisk image in bytes */
+/* board serial number. &64 bits should be enough for everybody& */
+#define ATAG_SERIAL 0x
+struct tag_serialnr {
+/* board revision */
+#define ATAG_REVISION 0x
+struct tag_revision {
+/* initial values for vesafb-type framebuffers. see struct screen_info
+ * in include/linux/tty.h
+#define ATAG_VIDEOLFB 0x
+struct tag_videolfb {
+/* command line: \0 terminated string */
+#define ATAG_CMDLINE 0x
+struct tag_cmdline {
+ char cmdline[1]; /* this is the minimum size */
+/* acorn RiscPC specific information */
+#define ATAG_ACORN 0x
+struct tag_acorn {
+ u32 memc_control_
+ u32 vram_
+/* footbridge memory clock, see arch/arm/mach-footbridge/arch.c */
+#define ATAG_MEMCLK 0x
+struct tag_memclk {
+struct tag {
+ struct tag_
struct tag_core
struct tag_mem32
struct tag_videotext
struct tag_ramdisk
struct tag_initrd
struct tag_serialnr
struct tag_revision
struct tag_videolfb
struct tag_cmdline
* Acorn specific
struct tag_acorn
* DC21285 specific
struct tag_memclk
+struct tagtable {
+ int (*parse)(const struct tag *);
+#define __tag __attribute__((unused, __section__(&.taglist&)))
+#define __tagtable(tag, fn) \
+static struct tagtable __tagtable_##fn __tag = { tag, fn }
+#define tag_member_present(tag,member)
+ ((unsigned long)(&((struct tag *)0L)-&member + 1) \
&= (tag)-&hdr.size * 4)
+#define tag_next(t) ((struct tag *)((u32 *)(t) + (t)-&hdr.size))
+#define tag_size(type) ((sizeof(struct tag_header) + sizeof(struct type)) && 2)
+#define for_each_tag(t,base)
+ for (t = t-&hdr. t = tag_next(t))
+ * Memory map description
+#define NR_BANKS 8
+struct meminfo {
+ struct {
+ } bank[NR_BANKS];
+extern st
+ * Board specified tags
+void setup_board_tags(struct tag **in_params);
Property changes on: include/asm/setup.h
___________________________________________________________________
Added: svn:executable
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Index: include/asm/utils.h
===================================================================
--- include/asm/utils.h (revision 0)
+++ include/asm/utils.h (revision 7)
@@ -0,0 +1,40 @@
+ * (C) Copyright 2010
+ * Texas Instruments, &&
+ * Aneesh V &&
+ * SPDX-License-Identifier: GPL-2.0+
+#ifndef _UTILS_H_
+#define _UTILS_H_
+static inline s32 log_2_n_round_up(u32 n)
+ s32 log2n = -1;
+ u32 temp =
+ while (temp) {
temp &&= 1;
+ if (n & (n - 1))
return log2n + 1; /* not power of 2 - round up */
return log2n; /* power of 2 */
+static inline s32 log_2_n_round_down(u32 n)
+ s32 log2n = -1;
+ u32 temp =
+ while (temp) {
temp &&= 1;
+ return log2n;
Property changes on: include/asm/utils.h
___________________________________________________________________
Added: svn:executable
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\ No newline at end of property
Index: include/asm/macro.h
===================================================================
--- include/asm/macro.h (revision 0)
+++ include/asm/macro.h (revision 7)
@@ -0,0 +1,111 @@
+ * include/asm-arm/macro.h
+ * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD &&
+ * SPDX-License-Identifier: GPL-2.0+
+#ifndef __ASM_ARM_MACRO_H__
+#define __ASM_ARM_MACRO_H__
+#ifdef __ASSEMBLY__
+ * These macros provide a convenient way to write 8, 16 and 32 bit data
+ * to any address.
+ * Registers r4 and r5 are used, any data in these registers are
+ * overwritten by the macros.
+ * The macros are valid for any ARM architecture, they do not implement
+ * any memory barriers so caution is recommended when using these when the
+ * caches are enabled or on a multi-core system.
+.macro write32, addr, data
+ ldr r4, =\addr
+ ldr r5, =\data
+ str r5, [r4]
+.macro write16, addr, data
+ ldr r4, =\addr
+ ldrh r5, =\data
+ strh r5, [r4]
+.macro write8, addr, data
+ ldr r4, =\addr
+ ldrb r5, =\data
+ strb r5, [r4]
+ * This macro generates a loop that can be used for delays in the code.
+ * Register r4 is used, any data in this register is overwritten by the
+ * macro.
+ * The macro is valid for any ARM architeture. The actual time spent in the
+ * loop will vary from CPU to CPU though.
+.macro wait_timer, time
+ ldr r4, =\time
+ subs r4, r4, #1
+#ifdef CONFIG_ARM64
+ * Register aliases.
+lr .req x30
+ * Branch according to exception level
+.macro switch_el, xreg, el3_label, el2_label, el1_label
+ mrs \xreg, CurrentEL
+ cmp \xreg, 0xc
+ b.eq \el3_label
+ cmp \xreg, 0x8
+ b.eq \el2_label
+ cmp \xreg, 0x4
+ b.eq \el1_label
+ * Branch if current processor is a slave,
+ * choose processor with all zero affinity value as the master.
+.macro branch_if_slave, xreg, slave_label
+ mrs \xreg, mpidr_el1
+ tst \xreg, #0xff
/* Test Affinity 0 */
+ b.ne \slave_label
+ lsr \xreg, \xreg, #8
+ tst \xreg, #0xff
/* Test Affinity 1 */
+ b.ne \slave_label
+ lsr \xreg, \xreg, #8
+ tst \xreg, #0xff
/* Test Affinity 2 */
+ b.ne \slave_label
+ lsr \xreg, \xreg, #16
+ tst \xreg, #0xff
/* Test Affinity 3 */
+ b.ne \slave_label
+ * Branch if current processor is a master,
+ * choose processor with all zero affinity value as the master.
+.macro branch_if_master, xreg1, xreg2, master_label
+ mrs \xreg1, mpidr_el1
+ lsr \xreg2, \xreg1, #32
+ lsl \xreg1, \xreg1, #40
+ lsr \xreg1, \xreg1, #40
+ orr \xreg1, \xreg1, \xreg2
+ cbz \xreg1, \master_label
+#endif /* CONFIG_ARM64 */
+#endif /* __ASSEMBLY__ */
+#endif /* __ASM_ARM_MACRO_H__ */
Property changes on: include/asm/macro.h
___________________________________________________________________
Added: svn:executable
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\ No newline at end of property
Index: include/asm/types.h
===================================================================
--- include/asm/types.h (revision 0)
+++ include/asm/types.h (revision 7)
@@ -0,0 +1,57 @@
+#ifndef __ASM_ARM_TYPES_H
+#define __ASM_ARM_TYPES_H
+typedef unsigned short umode_t;
+ * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
+ * header files exported to user space
+typedef __signed__ char __s8;
+typedef unsigned char __u8;
+typedef __signed__ short __s16;
+typedef unsigned short __u16;
+typedef __signed__ int __s32;
+typedef unsigned int __u32;
+#if defined(__GNUC__)
+__extension__ typedef __signed__ long long __s64;
+__extension__ typedef unsigned long long __u64;
+ * These aren't exported outside the kernel to avoid name space clashes
+#ifdef __KERNEL__
+typedef signed char s8;
+typedef unsigned char u8;
+typedef signed short s16;
+typedef unsigned short u16;
+typedef signed int s32;
+typedef unsigned int u32;
+typedef signed long long s64;
+typedef unsigned long long u64;
+#ifdef CONFIG_ARM64
+#define BITS_PER_LONG 64
+#else /* CONFIG_ARM64 */
+#define BITS_PER_LONG 32
+#endif /* CONFIG_ARM64 */
+/* Dma addresses are 32-bits wide.
+typedef u32 dma_addr_t;
+typedef unsigned long phys_addr_t;
+typedef unsigned long phys_size_t;
+#endif /* __KERNEL__ */
Property changes on: include/asm/types.h
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Index: include/asm/u-boot.h
===================================================================
--- include/asm/u-boot.h (revision 0)
+++ include/asm/u-boot.h (revision 7)
@@ -0,0 +1,53 @@
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH &&
+ * Marius Groeger &mgroeger@sysgo.de&
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH &&
+ * Alex Zuepke &azu@sysgo.de&
+ * SPDX-License-Identifier: GPL-2.0+
+ ********************************************************************
+ * NOTE: This header file defines an interface to U-Boot. Including
+ * this (unmodified) header file in another file is considered normal
+ * use of U-Boot, and does *not* fall under the heading of &derived
+ * work&.
+ ********************************************************************
+#ifndef _U_BOOT_H_
+#define _U_BOOT_H_ 1
+#ifdef CONFIG_SYS_GENERIC_BOARD
+/* Use the generic board which requires a unified bd_info */
+#include &asm-generic/u-boot.h&
+#ifndef __ASSEMBLY__
+typedef struct bd_info {
+ unsigned int bi_ /* serial console baudrate */
bi_arch_ /* unique id for this board */
bi_boot_ /* where this board expects params */
+ unsigned long bi_arm_ /* arm frequency */
+ unsigned long bi_dsp_ /* dsp core frequency */
+ unsigned long bi_ddr_ /* ddr frequency */
/* RAM configuration */
bi_dram[CONFIG_NR_DRAM_BANKS];
+#endif /* !CONFIG_SYS_GENERIC_BOARD */
+/* For image.h:image_check_target_arch() */
+#ifndef CONFIG_ARM64
+#define IH_ARCH_DEFAULT IH_ARCH_ARM
+#define IH_ARCH_DEFAULT IH_ARCH_ARM64
+#endif /* _U_BOOT_H_ */
Property changes on: include/asm/u-boot.h
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\ No newline at end of property
Index: include/asm/unaligned.h
===================================================================
--- include/asm/unaligned.h (revision 0)
+++ include/asm/unaligned.h (revision 7)
@@ -0,0 +1,19 @@
+#ifndef _ASM_ARM_UNALIGNED_H
+#define _ASM_ARM_UNALIGNED_H
+#include &linux/unaligned/le_byteshift.h&
+#include &linux/unaligned/be_byteshift.h&
+#include &linux/unaligned/generic.h&
+ * Select endianness
+#if __BYTE_ORDER == __LITTLE_ENDIAN
+#define get_unaligned __get_unaligned_le
+#define put_unaligned __put_unaligned_le
+#define get_unaligned __get_unaligned_be
+#define put_unaligned __put_unaligned_be
+#endif /* _ASM_ARM_UNALIGNED_H */
Property changes on: include/asm/unaligned.h
___________________________________________________________________
Added: svn:executable
## -0,0 +1 ##
\ No newline at end of property
Index: include/asm/memory.h
===================================================================
--- include/asm/memory.h (revision 0)
+++ include/asm/memory.h (revision 7)
@@ -0,0 +1,136 @@
linux/include/asm-arm/memory.h
Copyright (C)
Russell King
+ * This prog you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
Note: this file should not be included by non-asm/.h files
+#ifndef __ASM_ARM_MEMORY_H
+#define __ASM_ARM_MEMORY_H
+#if 0 /* XXX###XXX */
+#include &asm/arch/memory.h&
+ * PFNs are used to descri this means
+ * PFN 0 == physical address 0.
+ * This is the PFN of the first RAM page in the kernel
+ * direct-mapped view.
We assume this is the first page
+ * of RAM in the mem_map as well.
+#define PHYS_PFN_OFFSET (PHYS_OFFSET && PAGE_SHIFT)
+ * These are *only* valid on the kernel direct mapped RAM memory.
+static inline unsigned long virt_to_phys(void *x)
+ return __virt_to_phys((unsigned long)(x));
+static inline void *phys_to_virt(unsigned long x)
+ return (void *)(__phys_to_virt((unsigned long)(x)));
+#define __pa(x)
__virt_to_phys((unsigned long)(x))
+#define __va(x)
((void *)__phys_to_virt((unsigned long)(x)))
+ * Virtual &-& DMA view memory address translations
+ * Again, these are *only* valid on the kernel direct mapped RAM
+ * memory.
Use of these is *depreciated*.
+#define virt_to_bus(x)
(__virt_to_bus((unsigned long)(x)))
+#define bus_to_virt(x)
((void *)(__bus_to_virt((unsigned long)(x))))
+ * Conversion between a struct page and a physical address.
+ * Note: when converting an unknown physical address to a
+ * struct page, the resulting pointer must be validated
+ * using VALID_PAGE().
It must return an invalid struct page
+ * for any physical address not corresponding to a system
+ * RAM address.
page_to_pfn(page) convert a struct page * to a PFN number
pfn_to_page(pfn) convert a _valid_ PFN number to struct page *
pfn_valid(pfn) indicates whether a PFN number is valid
virt_to_page(k) convert a _valid_ virtual address to struct page *
virt_addr_valid(k) indicates whether a virtual address is valid
+#ifndef CONFIG_DISCONTIGMEM
+#define page_to_pfn(page) (((page) - mem_map) + PHYS_PFN_OFFSET)
+#define pfn_to_page(pfn) ((mem_map + (pfn)) - PHYS_PFN_OFFSET)
+#define pfn_valid(pfn)
((pfn) &= PHYS_PFN_OFFSET && (pfn) & (PHYS_PFN_OFFSET + max_mapnr))
+#define virt_to_page(kaddr) (pfn_to_page(__pa(kaddr) && PAGE_SHIFT))
+#define virt_addr_valid(kaddr) ((kaddr) &= PAGE_OFFSET && (kaddr) & (unsigned long)high_memory)
+#define PHYS_TO_NID(addr) (0)
+#define VALID_PAGE(page) ((page - mem_map) & max_mapnr)
+ * This is more complex.
We have a set of mem_map arrays spread
+ * around in memory.
+#define page_to_pfn(page)
+ (((page) - page_zone(page)-&zone_mem_map)
+ (page_zone(page)-&zone_start_paddr && PAGE_SHIFT))
+#define pfn_to_page(pfn)
+ (PFN_TO_MAPBASE(pfn) + LOCAL_MAP_NR((pfn) && PAGE_SHIFT))
+#define pfn_valid(pfn)
+ unsigned int node = PFN_TO_NID(pfn);
+ struct pglist_data *nd = NODE_DATA(node);
+ ((node & NR_NODES) &&
((pfn - (nd-&node_start_paddr && PAGE_SHIFT)) & nd-&node_size));\
+#define virt_to_page(kaddr)
+ (ADDR_TO_MAPBASE(kaddr) + LOCAL_MAP_NR(kaddr))
+#define virt_addr_valid(kaddr) (KVADDR_TO_NID(kaddr) & NR_NODES)
+ * Common discontigmem stuff.
PHYS_TO_NID is used by the ARM kernel/setup.c
+#define PHYS_TO_NID(addr) PFN_TO_NID((addr) && PAGE_SHIFT)
+ * 2.4 compatibility
+ * VALID_PAGE returns a non-zero value if given page pointer is valid.
+ * This assumes all node's mem_maps are stored within the node they
+ * refer to.
This is actually inherently buggy.
+#define VALID_PAGE(page) \
+({ unsigned int node = KVADDR_TO_NID(page); \
((node & NR_NODES) && \
((unsigned)((page) - NODE_MEM_MAP(node)) & NODE_DATA(node)-&node_size)); \
+ * We should really eliminate virt_to_bus() here - it's depreciated.
+#define page_to_bus(page) (virt_to_bus(page_address(page)))
+#endif /* XXX###XXX */
+#endif /* __ASM_ARM_MEMORY_H */
Property changes on: include/asm/memory.h
___________________________________________________________________
Added: svn:executable
## -0,0 +1 ##
\ No newline at end of property
Index: include/asm/linkage.h
===================================================================
--- include/asm/linkage.h (revision 0)
+++ include/asm/linkage.h (revision 7)
@@ -0,0 +1,7 @@
+#ifndef __ASM_LINKAGE_H
+#define __ASM_LINKAGE_H
+#define __ALIGN .align 0
+#define __ALIGN_STR &.align 0&
Property changes on: include/asm/linkage.h
___________________________________________________________________
Added: svn:executable
## -0,0 +1 ##
\ No newline at end of property
Index: include/asm/mach-types.h
===================================================================
--- include/asm/mach-types.h (revision 0)
+++ include/asm/mach-types.h (revision 7)
@@ -0,0 +1,14246 @@
+ * This was automagically generated from arch/arm/tools/mach-types!
+ * Do NOT edit
+#ifndef __ASM_ARM_MACH_TYPE_H
+#define __ASM_ARM_MACH_TYPE_H
+#ifndef __ASSEMBLY__
+/* The type of machine we're running on */
+extern unsigned int __machine_arch_
+/* see arch/arm/kernel/arch.c for a description of these */
+#define MACH_TYPE_EBSA110
+#define MACH_TYPE_RISCPC
+#define MACH_TYPE_EBSA285
+#define MACH_TYPE_NETWINDER
+#define MACH_TYPE_CATS
+#define MACH_TYPE_SHARK
+#define MACH_TYPE_BRUTUS
+#define MACH_TYPE_PERSONAL_SERVER
+#define MACH_TYPE_L7200
+#define MACH_TYPE_PLEB
+#define MACH_TYPE_INTEGRATOR
+#define MACH_TYPE_H3600
+#define MACH_TYPE_P720T
+#define MACH_TYPE_ASSABET
+#define MACH_TYPE_LART
+#define MACH_TYPE_GRAPHICSCLIENT
+#define MACH_TYPE_XP860
+#define MACH_TYPE_CERF
+#define MACH_TYPE_NANOENGINE
+#define MACH_TYPE_JORNADA720
+#define MACH_TYPE_EDB7211
+#define MACH_TYPE_PFS168
+#define MACH_TYPE_FLEXANET
+#define MACH_TYPE_SIMPAD
+#define MACH_TYPE_LUBBOCK
+#define MACH_TYPE_CLEP7212
+#define MACH_TYPE_SHANNON
+#define MACH_TYPE_CONSUS
+#define MACH_TYPE_AAED2000
+#define MACH_TYPE_CDB89712
+#define MACH_TYPE_GRAPHICSMASTER
+#define MACH_TYPE_ADSBITSY
+#define MACH_TYPE_PXA_IDP
+#define MACH_TYPE_PT_SYSTEM3
+#define MACH_TYPE_AUTCPU12
+#define MACH_TYPE_H3100
+#define MACH_TYPE_COLLIE
+#define MACH_TYPE_BADGE4
+#define MACH_TYPE_FORTUNET
+#define MACH_TYPE_MX1ADS
+#define MACH_TYPE_H7201
+#define MACH_TYPE_H7202
+#define MACH_TYPE_IQ80321
+#define MACH_TYPE_KS8695
+#define MACH_TYPE_SMDK2410
+#define MACH_TYPE_CEIVA
+#define MACH_TYPE_VOICEBLUE
+#define MACH_TYPE_H5400
+#define MACH_TYPE_OMAP_INNOVATOR
+#define MACH_TYPE_IXDP2400
+#define MACH_TYPE_IXDP2800
+#define MACH_TYPE_IXDP425
+#define MACH_TYPE_HACKKIT
+#define MACH_TYPE_IXCDP1100
+#define MACH_TYPE_AT91RM9200DK
+#define MACH_TYPE_CINTEGRATOR
+#define MACH_TYPE_VIPER
+#define MACH_TYPE_ADI_COYOTE
+#define MACH_TYPE_IXDP2401
+#define MACH_TYPE_IXDP2801
+#define MACH_TYPE_IQ31244
+#define MACH_TYPE_BAST
+#define MACH_TYPE_H1940
+#define MACH_TYPE_ENP2611
+#define MACH_TYPE_S3C2440
+#define MACH_TYPE_GUMSTIX
+#define MACH_TYPE_OMAP_H2
+#define MACH_TYPE_E740
+#define MACH_TYPE_IQ80331
+#define MACH_TYPE_VERSATILE_PB
+#define MACH_TYPE_KEV7A400
+#define MACH_TYPE_LPD7A400
+#define MACH_TYPE_LPD7A404
+#define MACH_TYPE_CSB337
+#define MACH_TYPE_MAINSTONE
+#define MACH_TYPE_XCEP
+#define MACH_TYPE_ARCOM_VULCAN
+#define MACH_TYPE_NOMADIK
+#define MACH_TYPE_CORGI
+#define MACH_TYPE_POODLE
+#define MACH_TYPE_ARMCORE
+#define MACH_TYPE_MX31ADS
+#define MACH_TYPE_HIMALAYA
+#define MACH_TYPE_EDB9312
+#define MACH_TYPE_OMAP_GENERIC
+#define MACH_TYPE_EDB9301
+#define MACH_TYPE_EDB9315
+#define MACH_TYPE_VR1000
+#define MACH_TYPE_OMAP_PERSEUS2
+#define MACH_TYPE_E800
+#define MACH_TYPE_E750
+#define MACH_TYPE_SCB9328
+#define MACH_TYPE_OMAP_H3
+#define MACH_TYPE_OMAP_H4
+#define MACH_TYPE_OMAP_OSK
+#define MACH_TYPE_TOSA
+#define MACH_TYPE_AVILA
+#define MACH_TYPE_EDB9302
+#define MACH_TYPE_HUSKY
+#define MACH_TYPE_SHEPHERD
+#define MACH_TYPE_H4700
+#define MACH_TYPE_RX3715
+#define MACH_TYPE_NSLU2
+#define MACH_TYPE_E400
+#define MACH_TYPE_IXDPG425
+#define MACH_TYPE_VERSATILE_AB
+#define MACH_TYPE_EDB9307
+#define MACH_TYPE_KB9200
+#define MACH_TYPE_SX1
+#define MACH_TYPE_IXDP465
+#define MACH_TYPE_IXDP2351
+#define MACH_TYPE_IQ80332
+#define MACH_TYPE_GTWX5715
+#define MACH_TYPE_CSB637
+#define MACH_TYPE_N30
+#define MACH_TYPE_NEC_MP900
+#define MACH_TYPE_KAFA
+#define MACH_TYPE_TS72XX
+#define MACH_TYPE_OTOM
+#define MACH_TYPE_NEXCODER_2440
+#define MACH_TYPE_ECO920
+#define MACH_TYPE_ROADRUNNER
+#define MACH_TYPE_AT91RM9200EK
+#define MACH_TYPE_SPITZ
+#define MACH_TYPE_ADSSPHERE
+#define MACH_TYPE_COLIBRI
+#define MACH_TYPE_GATEWAY7001
+#define MACH_TYPE_PCM027
+#define MACH_TYPE_ANUBIS
+#define MACH_TYPE_AKITA
+#define MACH_TYPE_E330
+#define MACH_TYPE_NOKIA770
+#define MACH_TYPE_CARMEVA
+#define MACH_TYPE_EDB9315A
+#define MACH_TYPE_STARGATE2
+#define MACH_TYPE_INTELMOTE2
+#define MACH_TYPE_TRIZEPS4
+#define MACH_TYPE_PNX4008
+#define MACH_TYPE_CPUAT91
+#define MACH_TYPE_IQ81340SC
+#define MACH_TYPE_IQ81340MC
+#define MACH_TYPE_MICRO9
+#define MACH_TYPE_MICRO9L
+#define MACH_TYPE_OMAP_PALMTE
+#define MACH_TYPE_REALVIEW_EB
+#define MACH_TYPE_BORZOI
+#define MACH_TYPE_PALMLD
+#define MACH_TYPE_IXDP28X5
+#define MACH_TYPE_OMAP_PALMTT
+#define MACH_TYPE_ARCOM_ZEUS
+#define MACH_TYPE_OSIRIS
+#define MACH_TYPE_PALMTE2
+#define MACH_TYPE_MX27ADS
+#define MACH_TYPE_AT91SAM9261EK
+#define MACH_TYPE_LOFT
+#define MACH_TYPE_MX21ADS
+#define MACH_TYPE_AMS_DELTA
+#define MACH_TYPE_NAS100D
+#define MACH_TYPE_MAGICIAN
+#define MACH_TYPE_NXDKN
+#define MACH_TYPE_PALMTX
+#define MACH_TYPE_S3C2413
+#define MACH_TYPE_WG302V2
+#define MACH_TYPE_OMAP_2430SDP
+#define MACH_TYPE_DAVINCI_EVM
+#define MACH_TYPE_PALMZ72
+#define MACH_TYPE_NXDB500
+#define MACH_TYPE_PALMT5
+#define MACH_TYPE_PALMTC
+#define MACH_TYPE_OMAP_APOLLON
+#define MACH_TYPE_ATEB9200
+#define MACH_TYPE_N35
+#define MACH_TYPE_LOGICPD_PXA270
+#define MACH_TYPE_NXEB500HMI
+#define MACH_TYPE_ESPRESSO
+#define MACH_TYPE_RX1950
+#define MACH_TYPE_GESBC9312
+#define MACH_TYPE_PICOTUX2XX
+#define MACH_TYPE_DSMG600
+#define MACH_TYPE_OMAP_FSAMPLE
+#define MACH_TYPE_SNAPPER_CL15
+#define MACH_TYPE_OMAP_PALMZ71
+#define MACH_TYPE_SMDK2412
+#define MACH_TYPE_SMDK2413
+#define MACH_TYPE_AML_M5900
+#define MACH_TYPE_BALLOON3
+#define MACH_TYPE_ECBAT91
+#define MACH_TYPE_ONEARM
+#define MACH_TYPE_SMDK2443
+#define MACH_TYPE_FSG
+#define MACH_TYPE_AT91SAM9260EK
+#define MACH_TYPE_GLANTANK
+#define MACH_TYPE_N2100
+#define MACH_TYPE_QT2410
+#define MACH_TYPE_KIXRP435
+#define MACH_TYPE_CC9P9360DEV
+#define MACH_TYPE_EDB9302A
+#define MACH_TYPE_EDB9307A
+#define MACH_TYPE_OMAP_3430SDP
+#define MACH_TYPE_VSTMS
+#define MACH_TYPE_MICRO9M
+#define MACH_TYPE_BUG
+#define MACH_TYPE_AT91SAM9263EK
+#define MACH_TYPE_EM7210
+#define MACH_TYPE_VPAC270
+#define MACH_TYPE_TREO680
+#define MACH_TYPE_ZYLONITE
+#define MACH_TYPE_MX31LITE
+#define MACH_TYPE_MIOA701
+#define MACH_TYPE_ARMADILLO5X0
+#define MACH_TYPE_CC9P9360JS
+#define MACH_TYPE_NOKIA_N800
+#define MACH_TYPE_EP80219
+#define MACH_TYPE_GORAMO_MLR
+#define MACH_TYPE_EM_X270
+#define MACH_TYPE_NEO1973_GTA02
+#define MACH_TYPE_AT91SAM9RLEK
+#define MACH_TYPE_COLIBRI320
+#define MACH_TYPE_CAM60
+#define MACH_TYPE_AT91EB01
+#define MACH_TYPE_DB88F5281
+#define MACH_TYPE_CSB726
+#define MACH_TYPE_DAVINCI_DM6467_EVM
+#define MACH_TYPE_DAVINCI_DM355_EVM
+#define MACH_TYPE_LITTLETON
+#define MACH_TYPE_REALVIEW_PB11MP
+#define MACH_TYPE_MX27_3DS
+#define MACH_TYPE_HALIBUT
+#define MACH_TYPE_TROUT
+#define MACH_TYPE_TCT_HAMMER
+#define MACH_TYPE_HERALD
+#define MACH_TYPE_SIM_ONE
+#define MACH_TYPE_JIVE
+#define MACH_TYPE_SAM9_L9260
+#define MACH_TYPE_REALVIEW_PB1176
+#define MACH_TYPE_YL9200
+#define MACH_TYPE_RD88F5182
+#define MACH_TYPE_KUROBOX_PRO
+#define MACH_TYPE_MX31_3DS
+#define MACH_TYPE_QONG
+#define MACH_TYPE_OMAP2EVM
+#define MACH_TYPE_OMAP3EVM
+#define MACH_TYPE_DNS323
+#define MACH_TYPE_OMAP3_BEAGLE
+#define MACH_TYPE_NOKIA_N810
+#define MACH_TYPE_PCM038
+#define MACH_TYPE_TS209
+#define MACH_TYPE_AT91CAP9ADK
+#define MACH_TYPE_MX31MOBOARD
+#define MACH_TYPE_TERASTATION_PRO2
+#define MACH_TYPE_LINKSTATION_PRO
+#define MACH_TYPE_E350
+#define MACH_TYPE_TS409
+#define MACH_TYPE_CM_X300
+#define MACH_TYPE_AT91SAM9G20EK
+#define MACH_TYPE_SMDK6410
+#define MACH_TYPE_U300
+#define MACH_TYPE_WRT350N_V2
+#define MACH_TYPE_OMAP_LDP
+#define MACH_TYPE_MX35_3DS
+#define MACH_TYPE_NEUROS_OSD2
+#define MACH_TYPE_TRIZEPS4WL
+#define MACH_TYPE_TS78XX
+#define MACH_TYPE_SFFSDR
+#define MACH_TYPE_PCM037
+#define MACH_TYPE_DB88F6281_BP
+#define MACH_TYPE_RD88F6192_NAS
+#define MACH_TYPE_RD88F6281
+#define MACH_TYPE_DB78X00_BP
+#define MACH_TYPE_SMDK2416
+#define MACH_TYPE_WBD111
+#define MACH_TYPE_MV2120
+#define MACH_TYPE_MX51_3DS
+#define MACH_TYPE_IMX27LITE
+#define MACH_TYPE_USB_A9260
+#define MACH_TYPE_USB_A9263
+#define MACH_TYPE_QIL_A9260
+#define MACH_TYPE_KZM_ARM11_01
+#define MACH_TYPE_NOKIA_N810_WIMAX
+#define MACH_TYPE_SAPPHIRE
+#define MACH_TYPE_STMP37XX
+#define MACH_TYPE_STMP378X
+#define MACH_TYPE_EZX_A780
+#define MACH_TYPE_EZX_E680
+#define MACH_TYPE_EZX_A1200
+#define MACH_TYPE_EZX_E6
+#define MACH_TYPE_EZX_E2
+#define MACH_TYPE_EZX_A910
+#define MACH_TYPE_EDMINI_V2
+#define MACH_TYPE_ZIPIT2
+#define MACH_TYPE_OMAP3_PANDORA
+#define MACH_TYPE_MSS2
+#define MACH_TYPE_LB88RC8480
+#define MACH_TYPE_MX25_3DS
+#define MACH_TYPE_OMAP3530_LV_SOM
+#define MACH_TYPE_DAVINCI_DA830_EVM
+#define MACH_TYPE_AT572D940HFEB
+#define MACH_TYPE_DOVE_DB
+#define MACH_TYPE_OVERO
+#define MACH_TYPE_AT2440EVB
+#define MACH_TYPE_NEOCORE926
+#define MACH_TYPE_WNR854T
+#define MACH_TYPE_RD88F5181L_GE
+#define MACH_TYPE_RD88F5181L_FXO
+#define MACH_TYPE_STAMP9G20
+#define MACH_TYPE_SMDKC100
+#define MACH_TYPE_TAVOREVB
+#define MACH_TYPE_SAAR
+#define MACH_TYPE_AT91SAM9M10G45EK
+#define MACH_TYPE_MXLADS
+#define MACH_TYPE_LINKSTATION_MINI
+#define MACH_TYPE_AFEB9260
+#define MACH_TYPE_IMX27IPCAM
+#define MACH_TYPE_RD88F6183AP_GE
+#define MACH_TYPE_REALVIEW_PBA8
+#define MACH_TYPE_REALVIEW_PBX
+#define MACH_TYPE_MICRO9S
+#define MACH_TYPE_RUT100
+#define MACH_TYPE_G3EVM
+#define MACH_TYPE_W90P910EVB
+#define MACH_TYPE_W90P950EVB
+#define MACH_TYPE_W90N960EVB
+#define MACH_TYPE_MV88F6281GTW_GE
+#define MACH_TYPE_NCP
+#define MACH_TYPE_DAVINCI_DM365_EVM
+#define MACH_TYPE_CENTRO
+#define MACH_TYPE_NOKIA_RX51
+#define MACH_TYPE_OMAP_ZOOM2
+#define MACH_TYPE_CPUAT9260
+#define MACH_TYPE_EUKREA_CPUIMX27
+#define MACH_TYPE_ACS5K
+#define MACH_TYPE_SNAPPER_9260
+#define MACH_TYPE_DSM320
+#define MACH_TYPE_EXEDA
+#define MACH_TYPE_MINI2440
+#define MACH_TYPE_COLIBRI300
+#define MACH_TYPE_LINKSTATION_LS_HGL
+#define MACH_TYPE_CPUAT9G20
+#define MACH_TYPE_SMDK6440
+#define MACH_TYPE_NAS4220B
+#define MACH_TYPE_ZYLONITE2
+#define MACH_TYPE_ASPENITE
+#define MACH_TYPE_TTC_DKB
+#define MACH_TYPE_PCM043
+#define MACH_TYPE_SHEEVAPLUG
+#define MACH_TYPE_AVENGERS_LITE
+#define MACH_TYPE_MX51_BABBAGE
+#define MACH_TYPE_RD78X00_MASA
+#define MACH_TYPE_DM355_LEOPARD
+#define MACH_TYPE_TS219
+#define MACH_TYPE_PCA100
+#define MACH_TYPE_DAVINCI_DA850_EVM
+#define MACH_TYPE_AT91SAM9G10EK
+#define MACH_TYPE_OMAP_4430SDP
+#define MACH_TYPE_MAGX_ZN5
+#define MACH_TYPE_BTMAVB101
+#define MACH_TYPE_BTMAWB101
+#define MACH_TYPE_OMAP3_TORPEDO
+#define MACH_TYPE_ANW6410
+#define MACH_TYPE_IMX27_VISSTRIM_M10
+#define MACH_TYPE_PORTUXG20
+#define MACH_TYPE_SMDKC110
+#define MACH_TYPE_OMAP3517EVM
+#define MACH_TYPE_NETSPACE_V2
+#define MACH_TYPE_NETSPACE_MAX_V2
+#define MACH_TYPE_D2NET_V2
+#define MACH_TYPE_NET2BIG_V2
+#define MACH_TYPE_NET5BIG_V2
+#define MACH_TYPE_INETSPACE_V2
+#define MACH_TYPE_AT91SAM9G45EKES
+#define MACH_TYPE_PC7302
+#define MACH_TYPE_SPEAR600
+#define MACH_TYPE_SPEAR300
+#define MACH_TYPE_LILLY1131
+#define MACH_TYPE_HMT
+#define MACH_TYPE_VEXPRESS
+#define MACH_TYPE_D2NET
+#define MACH_TYPE_BIGDISK
+#define MACH_TYPE_AT91SAM9G20EK_2MMC
+#define MACH_TYPE_BCMRING
+#define MACH_TYPE_DP6XX
+#define MACH_TYPE_MAHIMAHI
+#define MACH_TYPE_SMDK6442
+#define MACH_TYPE_OPENRD_BASE
+#define MACH_TYPE_DEVKIT8000
+#define MACH_TYPE_MX51_EFIKAMX
+#define MACH_TYPE_CM_T35
+#define MACH_TYPE_NET2BIG
+#define MACH_TYPE_IGEP0020
+#define MACH_TYPE_NUC932EVB
+#define MACH_TYPE_OPENRD_CLIENT
+#define MACH_TYPE_U8500
+#define MACH_TYPE_MX51_EFIKASB
+#define MACH_TYPE_MARVELL_JASPER
+#define MACH_TYPE_FLINT
+#define MACH_TYPE_TAVOREVB3
+#define MACH_TYPE_TOUCHBOOK
+#define MACH_TYPE_RAUMFELD_RC
+#define MACH_TYPE_RAUMFELD_CONNECTOR
+#define MACH_TYPE_RAUMFELD_SPEAKER
+#define MACH_TYPE_TNETV107X
+#define MACH_TYPE_SMDKV210
+#define MACH_TYPE_OMAP_ZOOM3
+#define MACH_TYPE_OMAP_3630SDP
+#define MACH_TYPE_SMARTQ7
+#define MACH_TYPE_WATSON_EFM_PLUGIN
+#define MACH_TYPE_G4EVM
+#define MACH_TYPE_OMAPL138_HAWKBOARD
+#define MACH_TYPE_TS41X
+#define MACH_TYPE_PHY3250
+#define MACH_TYPE_MINI6410
+#define MACH_TYPE_MX28EVK
+#define MACH_TYPE_SMARTQ5
+#define MACH_TYPE_DAVINCI_DM6467TEVM
+#define MACH_TYPE_MXT_TD60
+#define MACH_TYPE_RIOT_BEI2
+#define MACH_TYPE_RIOT_X37
+#define MACH_TYPE_CAPC7117
+#define MACH_TYPE_ICONTROL
+#define MACH_TYPE_QSD8X50A_ST1_5
+#define MACH_TYPE_MX23EVK
+#define MACH_TYPE_AP4EVB
+#define MACH_TYPE_MITYOMAPL138
+#define MACH_TYPE_GURUPLUG
+#define MACH_TYPE_SPEAR310
+#define MACH_TYPE_SPEAR320
+#define MACH_TYPE_AQUILA
+#define MACH_TYPE_ESATA_SHEEVAPLUG
+#define MACH_TYPE_MSM7X30_SURF
+#define MACH_TYPE_EA2478DEVKIT
+#define MACH_TYPE_TERASTATION_WXL
+#define MACH_TYPE_MSM7X25_SURF
+#define MACH_TYPE_MSM7X25_FFA
+#define MACH_TYPE_MSM7X27_SURF
+#define MACH_TYPE_MSM7X27_FFA
+#define MACH_TYPE_MSM7X30_FFA
+#define MACH_TYPE_QSD8X50_SURF
+#define MACH_TYPE_MX53_EVK
+#define MACH_TYPE_IGEP0030
+#define MACH_TYPE_SBC3530
+#define MACH_TYPE_SAARB
+#define MACH_TYPE_HARMONY
+#define MACH_TYPE_MSM7X30_FLUID
+#define MACH_TYPE_CM_T3517
+#define MACH_TYPE_WBD222
+#define MACH_TYPE_MSM8X60_SURF
+#define MACH_TYPE_MSM8X60_SIM
+#define MACH_TYPE_TCC8000_SDK
+#define MACH_TYPE_NANOS
+#define MACH_TYPE_STAMP9G45
+#define MACH_TYPE_CNS3420VB
+#define MACH_TYPE_OMAP4_PANDA
+#define MACH_TYPE_TI8168EVM
+#define MACH_TYPE_TETON_BGA
+#define MACH_TYPE_EUKREA_CPUIMX25SD
+#define MACH_TYPE_EUKREA_CPUIMX35SD
+#define MACH_TYPE_EUKREA_CPUIMX51SD
+#define MACH_TYPE_EUKREA_CPUIMX51
+#define MACH_TYPE_SMDKC210
+#define MACH_TYPE_OMAP3_BRAILLO
+#define MACH_TYPE_SPYPLUG
+#define MACH_TYPE_GINGER
+#define MACH_TYPE_TNY_T3530
+#define MACH_TYPE_PCA102
+#define MACH_TYPE_SPADE
+#define MACH_TYPE_MXC25_TOPAZ
+#define MACH_TYPE_T5325
+#define MACH_TYPE_GW2361
+#define MACH_TYPE_ELOG
+#define MACH_TYPE_INCOME
+#define MACH_TYPE_BCM589X
+#define MACH_TYPE_ETNA
+#define MACH_TYPE_HAWKS
+#define MACH_TYPE_MESON
+#define MACH_TYPE_XSBASE255
+#define MACH_TYPE_PVM2030
+#define MACH_TYPE_MIOA502
+#define MACH_TYPE_VVBOX_SDORIG2
+#define MACH_TYPE_VVBOX_SDLITE2
+#define MACH_TYPE_VVBOX_SDPRO4
+#define MACH_TYPE_HTC_SPV_M700
+#define MACH_TYPE_MX257SX
+#define MACH_TYPE_GONI
+#define MACH_TYPE_MSM8X55_SVLTE_FFA
+#define MACH_TYPE_MSM8X55_SVLTE_SURF
+#define MACH_TYPE_QUICKSTEP
+#define MACH_TYPE_DMW96
+#define MACH_TYPE_HAMMERHEAD
+#define MACH_TYPE_TRIDENT
+#define MACH_TYPE_LIGHTNING
+#define MACH_TYPE_ICONNECT
+#define MACH_TYPE_AUTOBOT
+#define MACH_TYPE_COCONUT
+#define MACH_TYPE_DURIAN
+#define MACH_TYPE_CAYENNE
+#define MACH_TYPE_FUJI
+#define MACH_TYPE_SYNOLOGY_6282
+#define MACH_TYPE_EM1SY
+#define MACH_TYPE_M502
+#define MACH_TYPE_MATRIX518
+#define MACH_TYPE_TINY_GURNARD
+#define MACH_TYPE_SPEAR1310
+#define MACH_TYPE_BV07
+#define MACH_TYPE_MXT_TD61
+#define MACH_TYPE_OPENRD_ULTIMATE
+#define MACH_TYPE_DEVIXP
+#define MACH_TYPE_MICCPT
+#define MACH_TYPE_MIC256
+#define MACH_TYPE_AS1167
+#define MACH_TYPE_OMAP3_IBIZA
+#define MACH_TYPE_U5500
+#define MACH_TYPE_DAVINCI_PICTO
+#define MACH_TYPE_MECHA
+#define MACH_TYPE_BUBBA3
+#define MACH_TYPE_PUPITRE
+#define MACH_TYPE_TEGRA_VOGUE
+#define MACH_TYPE_TEGRA_E1165
+#define MACH_TYPE_SIMPLENET
+#define MACH_TYPE_EC4350TBM
+#define MACH_TYPE_PEC_TC
+#define MACH_TYPE_PEC_HC2
+#define MACH_TYPE_ESL_MOBILIS_A
+#define MACH_TYPE_ESL_MOBILIS_B
+#define MACH_TYPE_ESL_WAVE_A
+#define MACH_TYPE_ESL_WAVE_B
+#define MACH_TYPE_UNISENSE_MMM
+#define MACH_TYPE_BLUESHARK
+#define MACH_TYPE_E10
+#define MACH_TYPE_APP3K_ROBIN
+#define MACH_TYPE_POV15HD
+#define MACH_TYPE_STELLA
+#define MACH_TYPE_LINKSTATION_LSCHL
+#define MACH_TYPE_NETWALKER
+#define MACH_TYPE_ACSX106
+#define MACH_TYPE_ATLAS5_C1
+#define MACH_TYPE_NSB3AST
+#define MACH_TYPE_GNET_SLC
+#define MACH_TYPE_AF4000
+#define MACH_TYPE_ARK9431
+#define MACH_TYPE_FS_S5PC100
+#define MACH_TYPE_OMAP3505NOVA8
+#define MACH_TYPE_OMAP3621_EDP1
+#define MACH_TYPE_ORATISAES
+#define MACH_TYPE_SMDKV310
+#define MACH_TYPE_SIEMENS_L0
+#define MACH_TYPE_VENTANA
+#define MACH_TYPE_WM8505_7IN_NETBOOK
+#define MACH_TYPE_EC4350SDB
+#define MACH_TYPE_MIMAS
+#define MACH_TYPE_TITAN
+#define MACH_TYPE_CRANEBOARD
+#define MACH_TYPE_ES2440
+#define MACH_TYPE_NAJAY_A9263
+#define MACH_TYPE_HTCTORNADO
+#define MACH_TYPE_DIMM_MX257
+#define MACH_TYPE_JIGEN
+#define MACH_TYPE_SMDK6450
+#define MACH_TYPE_MENO_QNG
+#define MACH_TYPE_NS2416
+#define MACH_TYPE_RPC353
+#define MACH_TYPE_TQ6410
+#define MACH_TYPE_SKY6410
+#define MACH_TYPE_DYNASTY
+#define MACH_TYPE_VIVO
+#define MACH_TYPE_BURY_BL7582
+#define MACH_TYPE_BURY_BPS5270
+#define MACH_TYPE_BASI
+#define MACH_TYPE_TN200
+#define MACH_TYPE_C2MMI
+#define MACH_TYPE_MESON_6236M
+#define MACH_TYPE_MESON_8626M
+#define MACH_TYPE_TUBE
+#define MACH_TYPE_MESSINA
+#define MACH_TYPE_MX50_ARM2
+#define MACH_TYPE_CETUS9263
+#define MACH_TYPE_BROWNSTONE
+#define MACH_TYPE_VMX25
+#define MACH_TYPE_VMX51
+#define MACH_TYPE_ABACUS
+#define MACH_TYPE_CM4745
+#define MACH_TYPE_ORATISLINK
+#define MACH_TYPE_DAVINCI_DM365_DVR
+#define MACH_TYPE_NETVIZ
+#define MACH_TYPE_FLEXIBITY
+#define MACH_TYPE_WLAN_COMPUTER
+#define MACH_TYPE_LPC24XX
+#define MACH_TYPE_SPICA
+#define MACH_TYPE_GPSDISPLAY
+#define MACH_TYPE_BIPNET
+#define MACH_TYPE_OVERO_CTU_INERTIAL
+#define MACH_TYPE_DAVINCI_DM355_MMM
+#define MACH_TYPE_PC9260_V2
+#define MACH_TYPE_PTX7545
+#define MACH_TYPE_TM_EFDC
+#define MACH_TYPE_OMAP3_WALDO1
+#define MACH_TYPE_FLYER
+#define MACH_TYPE_TORNADO3240
+#define MACH_TYPE_SOLI_01
+#define MACH_TYPE_OMAPL138_EUROPALC
+#define MACH_TYPE_HELIOS_V1
+#define MACH_TYPE_NETSPACE_LITE_V2
+#define MACH_TYPE_SSC
+#define MACH_TYPE_PREMIERWAVE_EN
+#define MACH_TYPE_WASABI
+#define MACH_TYPE_MX50_RDP
+#define MACH_TYPE_UNIVERSAL_C210
+#define MACH_TYPE_REAL6410
+#define MACH_TYPE_SPX_SAKURA
+#define MACH_TYPE_IJ3K_2440
+#define MACH_TYPE_OMAP3_BC10
+#define MACH_TYPE_THEBE
+#define MACH_TYPE_RV082
+#define MACH_TYPE_ARMLGUEST
+#define MACH_TYPE_TJINC1000
+#define MACH_TYPE_DOCKSTAR
+#define MACH_TYPE_AX8008
+#define MACH_TYPE_GNET_SGCE
+#define MACH_TYPE_PXWNAS_500_1000
+#define MACH_TYPE_EA20
+#define MACH_TYPE_AWM2
+#define MACH_TYPE_TI8148EVM
+#define MACH_TYPE_SEABOARD
+#define MACH_TYPE_LINKSTATION_CHLV2
+#define MACH_TYPE_TERA_PRO2_RACK
+#define MACH_TYPE_RUBYS
+#define MACH_TYPE_AQUARIUS
+#define MACH_TYPE_MX53_ARD
+#define MACH_TYPE_MX53_SMD
+#define MACH_TYPE_LSWXL
+#define MACH_TYPE_DOVE_AVNG_V3
+#define MACH_TYPE_SDI_ESS_9263
+#define MACH_TYPE_JOCPU550
+#define MACH_TYPE_MSM8X60_RUMI3
+#define MACH_TYPE_MSM8X60_FFA
+#define MACH_TYPE_YANOMAMI
+#define MACH_TYPE_GTA04
+#define MACH_TYPE_CM_A510
+#define MACH_TYPE_OMAP3_RFS200
+#define MACH_TYPE_KX33XX
+#define MACH_TYPE_PTX7510
+#define MACH_TYPE_TOP9000
+#define MACH_TYPE_TEENOTE
+#define MACH_TYPE_TS3
+#define MACH_TYPE_A0
+#define MACH_TYPE_FSM9XXX_SURF
+#define MACH_TYPE_FSM9XXX_FFA
+#define MACH_TYPE_FRRHWCDMA60W
+#define MACH_TYPE_REMUS
+#define MACH_TYPE_AT91CAP7XDK
+#define MACH_TYPE_AT91CAP7STK
+#define MACH_TYPE_KT_SBC_SAM9_1
+#define MACH_TYPE_ARMADA_XP_DB
+#define MACH_TYPE_SPDM
+#define MACH_TYPE_GTIB
+#define MACH_TYPE_DGM3240
+#define MACH_TYPE_HTCMEGA
+#define MACH_TYPE_TRICORDER
+#define MACH_TYPE_TX28
+#define MACH_TYPE_BSTBRD
+#define MACH_TYPE_PWB3090
+#define MACH_TYPE_IDEA6410
+#define MACH_TYPE_QBC9263
+#define MACH_TYPE_BORABORA
+#define MACH_TYPE_VALDEZ
+#define MACH_TYPE_LS9G20
+#define MACH_TYPE_MIOS_V1
+#define MACH_TYPE_S5PC110_CRESPO
+#define MACH_TYPE_CONTROLTEK9G20
+#define MACH_TYPE_TIN307
+#define MACH_TYPE_TIN510
+#define MACH_TYPE_BLUECHEESE
+#define MACH_TYPE_TEM3X30
+#define MACH_TYPE_HARVEST_DESOTO
+#define MACH_TYPE_MSM8X60_QRDC
+#define MACH_TYPE_SPEAR900
+#define MACH_TYPE_PCONTROL_G20
+#define MACH_TYPE_RDSTOR
+#define MACH_TYPE_USDLOADER
+#define MACH_TYPE_TSOPLOADER
+#define MACH_TYPE_KRONOS
+#define MACH_TYPE_FFCORE
+#define MACH_TYPE_MONE
+#define MACH_TYPE_UNIT2S
+#define MACH_TYPE_ACER_A5
+#define MACH_TYPE_ETHERPRO_ISP
+#define MACH_TYPE_STRETCHS7000
+#define MACH_TYPE_P87_SMARTSIM
+#define MACH_TYPE_TULIP
+#define MACH_TYPE_SUNFLOWER
+#define MACH_TYPE_RIB
+#define MACH_TYPE_CLOD
+#define MACH_TYPE_RUMP
+#define MACH_TYPE_TENDERLOIN
+#define MACH_TYPE_SHORTLOIN
+#define MACH_TYPE_ANTARES
+#define MACH_TYPE_WB40N
+#define MACH_TYPE_HERRING
+#define MACH_TYPE_NAXY400
+#define MACH_TYPE_NAXY1200
+#define MACH_TYPE_VPR200
+#define MACH_TYPE_BUG20
+#define MACH_TYPE_GOFLEXNET
+#define MACH_TYPE_TORBRECK
+#define MACH_TYPE_SAARB_MG1
+#define MACH_TYPE_CALLISTO
+#define MACH_TYPE_MULTHSU
+#define MACH_TYPE_SALUDA
+#define MACH_TYPE_PEMP_OMAP3_APOLLO
+#define MACH_TYPE_VC0718
+#define MACH_TYPE_MVBLX
+#define MACH_TYPE_INHAND_APEIRON
+#define MACH_TYPE_INHAND_FURY
+#define MACH_TYPE_INHAND_SIREN
+#define MACH_TYPE_HDNVP
+#define MACH_TYPE_SOFTWINNER
+#define MACH_TYPE_PRIMA2_EVB
+#define MACH_TYPE_NAS6210
+#define MACH_TYPE_UNISDEV
+#define MACH_TYPE_SBCA11
+#define MACH_TYPE_SAGA
+#define MACH_TYPE_NS_K330
+#define MACH_TYPE_TANNA
+#define MACH_TYPE_IMATE8502
+#define MACH_TYPE_ASPEN
+#define M