求教口袋妖怪黑白的模拟器？？？_口袋妖怪吧_百度贴吧
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本吧签到人数：0可签7级以上的吧50个
本月漏签0次！成为超级会员，赠送8张补签卡连续签到：天&&累计签到：天超级会员单次开通12个月以上，赠送连续签到卡3张
关注：584,436贴子：
求教口袋妖怪黑白的模拟器？？？
想玩口袋妖怪黑白版，但是金手指不会用呀。。。求模拟器和金手指怎么用。。。
笑死我了o(╯□╰)o绝对没...
请问iphone6 plus，ipad...
本人学生党，更新时间不...
口袋妖怪黑白2等离子团...
ui培训哪个好，0基础+双证+实战「就业无忧」
再补充一条，要中文的。。。
模拟器用D打头的那个另 珍爱生命啊楼主
desmume模拟器很卡，建议楼主打个补丁然后在zommer上玩
LS正解 网络上有免金手指补丁的 地址
回复4楼：D哪里卡 很流畅啊
desmume最新的版本一点都不卡···但偏偏能联机的3947版本有点卡···
回复9楼：不一定非得高配才不卡
贴吧热议榜
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保存至快速回贴求用这个模拟器怎么运行 黑_口袋妖怪吧_百度贴吧
&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&&签到排名：今日本吧第个签到，本吧因你更精彩，明天继续来努力！
本吧签到人数：0可签7级以上的吧50个
本月漏签0次！成为超级会员，赠送8张补签卡连续签到：天&&累计签到：天超级会员单次开通12个月以上，赠送连续签到卡3张
关注：584,436贴子：
求用这个模拟器怎么运行 黑
貌似要输老金，但网上的不能用
试了好几个都不行、就想...
手机上的，不过只限于kr...
地址：http://gw2.vsgam...
这电脑用了有10几年了。...
运行win98系统还行，运...
苦逼的双系统等得真漫长...
ui培训哪个好，0基础+双证+实战「就业无忧」
我记得以前有个兼容性补丁，只要把那个打在黑白上，就可以用这个模拟器玩
tgbus有整合包。
用DeSmuME5SP呗- =还可以加速，不容易死机，而且也不是特别卡，有下载，相对DeSmuME，要求的配置更低些，更流畅些，比什么zommer好用多了，画质也好，到现在都用这个，不喜欢用zommer- =
直接去下黑白HH修正版rom
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保存至快速回贴Lead and lead frame for power package
United States Patent 8796837
A power device includes a semiconductor chip provided over a substrate, and a patterned lead. The patterned lead includes a raised portion located between a main portion and an end portion. At least part of the raised portion is positioned over the semiconductor chip at a larger height than both the main portion and the end portion. A bonding pad may also be included. The end portion may include a raised portion, bonded portion, and connecting portion. At least part of the bonded portion is bonded to the bonding pad and at least part of the raised portion is positioned over the bonding pad at a larger height than the bonded portion and connecting portion. The end portion may also include a plurality of similarly raised portions.
Inventors:
Zommer, Nathan (Fort Lauderdale, FL, US)
Choi, Kang Rim (Cupertino, CA, US)
Application Number:
Publication Date:
08/05/2014
Filing Date:
09/17/2009
Export Citation:
IXYS Corporation (Milpitas, CA, US)
Primary Class:
Other Classes:
257/E23.07
International Classes:
H01L23/528
Field of Search:
257/692, 257/E23.07
View Patent Images:
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US Patent References:
7391121Otremba257/7846731002Choi6534343Choi6075286Ewer257/692
Primary Examiner:
Tornow, Mark
Assistant Examiner:
Boyle, Abbigale
Attorney, Agent or Firm:
Imperium Patent Works
Adibi, Amir V.
Parent Case Data:
CROSS-REFERENCES TO RELATED APPLICATIONSThe present application claims priority to U.S. Provisional Patent Application No. 61/157,115, filed on Mar. 3, 2009, which is incorporated by reference in its entirety.
What is claimed is:
A power device comprising: a power semiconductor chip having an upper surface defining an upper surface plane, and a lower surface, the lower surface affi encapsulating material surrounding the substrate and the powe and a lead comprising a main portion, a raised portion, and an end portion, wherein the main portion is separated from the end portion by the raised portion, wherein the lead is a unitary piece of leadframe metal, the main portion extending from outside the encapsulating material to the power semiconductor chip and having a longitudinal axis, the longitudinal axis of the main portion being disposed parallel to the upper surface plane of the powe the end portion is bonded to, and is in electrical contact with, a bonding pad on the upper surface of the powe and at least part of the raised portion is positioned above the semiconductor chip at a greater height than each of the main portion and the end portion, wherein the end portion comprises a contact finger which includes a first contact region and a second contact region, wherein the first contact region makes electrical contact to the bonding pad at a first location on the bonding pad, wherein the second contact region makes electrical contact to the bonding pad at a second location on the bonding pad, and wherein the first contact region and the second contact region are separated by an intervening region which is not in physical contact with the bonding pad, and wherein the raised portion extends toward the end portion in a first direction, wherein the end portion includes a first finger that extends in a second direction, wherein the end portion further includes a second finger that extends parallel to the first finger, and wherein the first direction is substantially perpendicular to the second direction.
The power device of claim 1, wherein the end portion is disposed at an angle to the longitudinal axis.
The power device of claim 1, wherein the first finger includes a first raised portion that is not in physical contact with the bonding pad and also includes a first contact portion that is in physical contact with the bonding pad, and wherein the second finger includes a second raised portion that is not in physical contact with the bonding pad and also includes a second contact portion that is in physical contact with the bonding pad.
The power device of claim 1, wherein the lead is a single piece of electrically conductive material formed from a single sheet of the leadframe metal.
The power device of claim 4, wherein the single piece of electrically conductive material makes multiple separate physical connections to the power semiconductor chip.
A lead frame for use with a power semiconductor chip, wherein the power semiconductor chip has an upper surface defining an upper surface plane, and a lower surface, wherein the lower surface is affixed to a substrate, wherein encapsulating material encapsulates the power semiconductor chip, the lead frame comprising: a plurality of electrically conductive leads, wherein each electrically conductive lead includes a main portion connected to an end portion the main portion having a longitudinal axis extending from outside the encapsulating material toward the power semiconductor chip, the longitudinal axis of the main portion of the electrically conductive lead being disposed parallel to, and substantially in the plane of, the upper surface plane of the powe the end portion being in electrical contact with a bonding pad on the upper surface of the powe and at least part of the raised portion is positioned above the semiconductor chip at a greater height than both the main portion and the end portion, wherein the end portion comprises a contact finger which includes a first contact region and a second contact region, wherein the first contact region makes electrical contact to the bonding pad at a first location on the bonding pad, wherein the second contact region makes electrical contact to the bonding pad at a second location on the bonding pad, and wherein the first contact region and the second contact region are separated by an intervening region which is not in physical contact with the bonding pad, and wherein the raised portion extends toward the end portion in a first direction, wherein the end portion includes a first finger that extends in a second direction, wherein the end portion further includes a second finger that extends parallel to the first finger, and wherein the first direction is substantially perpendicular to the second direction.
The power device of claim 1, wherein the end portion further includes a third contact finger with a third finger longitudinal axis which is substantially parallel to the first finger longitudinal axis and to the second finger longitudinal axis.
The power device of claim 1, wherein the end portion makes electrical contact with the bonding pad via an amount of solder.
The power device of claim 1, wherein the first and second contact regions make electrical contact to the bonding pad via an amount of a bonding material.
The power device of claim 1, wherein the lead is a single piece of electrically conductive material that is patterned from a single sheet of a metal layer.
Description:
TECHNICAL FIELDThe present invention relates to electronic devices, and more particularly to a lead and lead frame for a packaged power semiconductor device.BACKGROUNDFIG. 1a illustrates a conventional power device having a wire bonded lead frame. FIG. 1b illustrates a cross-sectional view along line A-A in FIG. 1a. A set of leads (1, 2, 3) is interconnected to a power chip 7 via wires that are soldered to each lead in the set of leads (1, 2, 3) and a corresponding pad (4, 5, 6) provided on the power chip 7. The power chip 7 is provided on a substrate 8 and the resulting structure is encased in a plastic encapsulation 9. The wire bonding is performed as a separate operation after die attaching the power chip 7 to the substrate 8. The leads (1, 2, 3) may each correspond to a gate, source, and drain of the power chip 7, where the source and drain are high current leads and the gate is a low-current lead for a control signal.In this conventional power device, the wiring requires the use of special bonding techniques, such as ultrasound wire bonding. The required bonding material and wires add resistance to the flow of current. Accordingly, even if the power chip 7 itself is capable of operating with a particular amount of current, the bonding material and wires limit the maximum current of the device to an amount that is less than the amount which the power chip 7 is capable of withstanding.FIG. 2a illustrates a conventional power device having clip joints. FIG. 2b illustrates a cross-sectional view along line A-A in FIG. 2a. A set of pins (30, 31, 32) is connected to a power transistor 39 via clips (21, 22, 23). Each clip (21, 22, 23) is shaped as a single lead. The power transistor 39 is provided on a metal can package 40. One end of each of the clips (21, 22, 23) is bonded, via a solder joint (24, 25, 26), to a pad (36, 37, 38) coupled to the power transistor 39. The other end of each of the clips (21, 22, 23) includes a hole (33, 34, 35) through which one of the pins (30, 31, 32) extends through and is soldered to an inner surface thereof. The clips (21, 22, 23) may each correspond to one of the base, emitter, and collector of the power transistor 39. Each of the pins (30, 31, 32) also extends through a hole (27, 28, 29) in the metal can package 40.In this conventional power device, the solder joints (24, 25, 26) are susceptible to mechanical stress between the clips (21, 22, 23) and the power transistor 39, which may result in deterioration from thermal fatigue. The power transistor 39 also has a limited current capacity due to structural elements such as the solder used to couple the pins (30, 31, 32) to the clips (21, 22, 23).Accordingly, an improved apparatus is desired that solves some of the problems and reduces some of the drawbacks discussed above.SUMMARYIn some embodiments, a power device includes a semiconductor chip provided over a substrate, and a patterned lead. The patterned lead includes a raised portion located between a main portion and an end portion. The end portion is bonded to the semiconductor chip. At least part of the raised portion is positioned over the semiconductor chip at a larger height than both the main portion and the end portion. Positioning at least part of the raised portion over the semiconductor chip at least advantageously increases the electrical isolation between the lead and the semiconductor chip.In some embodiments, the power device also includes a bonding pad coupled to the semiconductor chip. The end portion may include a raised portion, a bonded portion, and a connecting portion. At least a part of the bonded portion is bonded to the bonding pad via bonding material. At least part of the raised portion is positioned between the bonded portion and the connecting portion and over the bonding pad at a larger height than the bonded portion and the connecting portion. The connecting portion may be coupled to the main portion. Positioning at least part of the raised portion over the bonding pad at least advantageously increases resilience of the bonding material to mechanical stress and heating fatigue.In some embodiments, the end portion includes a plurality of raised portions. At least a part of each of the raised portions is positioned over the bonding pad at a larger height than corresponding bonded and connecting portions of the end portion. The plurality of raised portions advantageously increases heat dissipation and also increases resilience to mechanical stress and thermal fatigue.These and other advantages of the invention will be apparent to those of ordinary skill in the art by reference to the following detailed description and the accompanying drawings.BRIEF DESCRIPTION OF THE DRAWINGSIn order to more fully understand the present invention, reference is made to the accompanying drawings. Understanding that these drawings are not to be considered limitations in the scope of the invention, the presently described embodiments and the presently understood best mode of the invention are described with additional detail through use of the accompanying drawings.FIG. 1a illustrates a conventional power device having a wire bonded lead frame.FIG. 1b illustrates a cross-sectional view of a conventional power device having a wire bonded lead frame.FIG. 2a illustrates a conventional power device having clip joints.FIG. 2b illustrates a cross-sectional view of a conventional power device having clip joints.FIG. 3a illustrates a packaged semiconductor device including a lead having a raised portion positioned over a power chip.FIG. 3b illustrates a cross-sectional view of a packaged semiconductor device including a lead having a raised portion positioned over a power chip.FIG. 4a illustrates a packaged semiconductor device including a lead having an end portion comprising a raised portion positioned over a bonding pad.FIG. 4b illustrates a cross-sectional view of a packaged semiconductor device including a lead having an end portion comprising a raised portion positioned over a bonding pad.FIG. 5 illustrates a packaged semiconductor device including a lead having a plurality of end portions each comprising a raised portion positioned over a bonding pad.DETAILED DESCRIPTIONThe embodiments discussed herein are illustrative of one or more examples of the present invention. As these embodiments of the present invention are described with reference to illustrations, various modifications or adaptations of the methods and/or specific structures described may become apparent to those skilled in the art. All such modifications, adaptations, or variations that rely upon the teachings of the present invention, and through which these teachings have advanced the art, are considered to be within the scope of the present invention. Hence, the present descriptions and drawings should not be considered in a limiting sense, as it is understood that the present invention is in no way limited to only the embodiments illustrated.FIG. 3a illustrates a top view of a packaged semiconductor device according to one embodiment. FIG. 3b illustrates a cross-sectional view of a packaged semiconductor device along line A-A in FIG. 3a. Leads (41, 42, 43) are provided (i.e., mechanically and electrically) at any terminal, such as a gate, source, and drain, of a three terminal power chip 48, such as a BJT, MOSFET, and the like. The power chip 48 may be a semiconductor chip packaged as an integrated circuit. The leads (41, 42, 43) may be made from metal having high electrical and/or thermal conductivity, such as copper, silver, brass, and the like. The leads (41, 42, 43) may result from a patterning of a copper layer, silver layer, brass layer, and the like. The leads may result from fully patterning the layers or partially patterning the layers.The power chip 48 may be provided on or above a substrate 49 and the combined components may be surrounded by an encapsulating material 50. The encapsulating material 50 is typically epoxy, plastic, rubber, silicone, or similar materials and is molded, cast, or otherwise formed around the substrate 49 and related structures. The substrate 49 can be metal, direct bonded copper on ceramic, direct bonded aluminum on ceramic, copper bonded with a polymer on aluminum, ceramic material, or any combination thereof.One of the leads 41 may be wire bonded, via a wire 44, to a pad 45 coupled to the power chip 48. Such wire bonding techniques are described in U.S. Pat. No. 6,731,002, which is assigned to IXYS Corp. of Milpitas, Calif., and which is incorporated by reference in its entirety. Another one of the leads 42 may be directly bonded to the substrate 49. Such a bonding technique is also described in U.S. Pat. No. 6,731,002, which is assigned to IXYS Corp. of Milpitas, Calif. Another one of the leads 43 may be bonded, via a bonding material 46 such as solder, to a bonding pad 47 coupled to the power device 48. The leads (42, 43) may be solder plated.The lead 43 may include a main portion 43a, a raised portion 43b, and an end portion 43c. The end portion 43c is bonded, via the bonding material 46, to the bonding pad 47. The main portion 43a is coupled to a lead frame. At least part of the raised portion 43b is positioned above a top surface of the power chip 48 at a height larger than the main portion 43a and the end portion 43c. In other words, a distance from the top surface of the power chip 48 to a bottom surface of at least part of the raised portion 43b is greater than a distance from the top surface of the power chip 48 to a bottom surface of the main portion 43a and is also greater than a distance from the top surface of the power chip 48 to a bottom surface of the end portion 43c. The distance from the top surface of the power chip 48 to the bottom surface of the main portion 43a may be equal to the distance from the top surface of the power chip 48 to the bottom surface of the end portion 43c. Providing at least part of the raised portion 43b above a top surface of the power chip 48 at a height larger than the main portion 43a and the end portion 43c advantageously increases the electrical isolation between the lead 43 and the power chip 48.The raised portion 43b, when viewed from a top view as illustrated in FIG. 3a, may be in the shape of a straight line, a curved line, a plurality of curved lines, a half-square, a plurality of half-squares, and the like. In one embodiment, as illustrated in FIG. 3a, the raised portion 43b, when viewed from a top view, is in the shape of a straight line. The raised portion 43b, when viewed from a cross-sectional view as illustrated in FIG. 3b, may be in the shape of an arc, a plurality of arcs, a half-square, a plurality of half-squares, and the like. In one embodiment, as illustrated in FIG. 3b, the raised portion 43b, when viewed from a cross-sectional view, is in the shape of an arc.The lead 43 may be used in place of leads (41, 42). Alternatively, only a single lead 43 or multiple leads 43 are provided. The leads may advantageously be provided in a lead frame as described in U.S. Pat. No. 6,534,343, which is assigned to IXYS Corp. of Milpitas, Calif., and which is incorporated by reference in its entirety, and as described in U.S. Pat. No. 6,731,002, which is assigned to IXYS Corp. of Milpitas, Calif. Special wire-bonding techniques are not required for the lead 43, resulting in reducing bonding costs. The lead 43 also avoids the use of wires and multiple bonding points as compared to conventional techniques, thereby reducing the resistance of a connection to a terminal of the power chip 48.In one embodiment, the lead 43 is only used for high current power device terminals, such as sources and drains. Alternatively, the lead 43 may be used for low current power device terminals. The bonding of the lead 42 to the substrate 49 and of the lead 43 to the bonding pad 47 of the power device 48 may be done in one step, which may also be the step of attaching the power device 48 to the substrate 49. This bonding may be performed using a solder reflow oven as described in U.S. Pat. No. 6,534,343 and U.S. Pat. No. 6,731,002, both of which are assigned to IXYS Corp. of Milpitas, Calif., for binding a lead frame to a substrate. The lead 43 and/or leads (41, 42) may be provided for multiple power chips on one or more substrates 49.FIG. 4a illustrates a top view of a packaged semiconductor device according to one embodiment. FIG. 4b illustrates a cross-sectional view from line A-A in FIG. 4a. FIG. 4a and FIG. 4b show a modification to the lead 43 illustrated in FIG. 3a and FIG. 3b. Accordingly, the implementations and variations described in accordance with the embodiment illustrated in FIG. 3a and FIG. 3b are applicable to the embodiment illustrated in FIG. 4a and FIG. 4b. In this embodiment, the end portion 43c of the lead 43 includes a raised portion 43d, a bonded portion 43e, and a connecting portion 43f. The bonded portion 43e is coupled to the raised portion 43d, and at least a part of the bonded portion 43e is bonded, via the bonding material 46, to the bonding pad 47. The connecting portion 43f is coupled to the raised portion 43d and the raised portion 43b. The connecting portion 43f may include one or more arcs, bends, and the like, so that the end portion 43c may be provided in the shape of a curved line or provided at any angle relative to the main portion 43a as described below. In one embodiment, there is no raised portion 43b. Accordingly, the connecting portion 43f, and thus the end portion 43c, is directly coupled to the main portion 43a. The raised portion 43d is located between the bonded portion 43e and the connecting portion 43f. The raised portion 43d has similar characteristics as the raised portion 43b. However, the raised portion 43d is positioned above a top surface of the bonding pad 47 at a height larger than at least the bonding portion 43e. In one embodiment, the raised portion 43d is positioned over a top surface of the bonding pad 47 at a height larger than both the bonding portion 43e and the connecting portion 43f. In other words, a distance from the top surface of the bonding pad 47 to a bottom surface of the raised portion 43d is greater than a distance from the top surface of the bonding pad 47 to a bottom surface of both of the bonding portion 43e and the connecting portion 43f. The end portion 43c, when viewed from a top view as illustrated in FIG. 4a, may be in the shape of a straight line, a curved line, or provided at any angle relative to the main portion 43a. In one embodiment, as illustrated in FIG. 4a, the end portion 43c is provided to extend at approximately a ninety degree angle relative to the main portion 43a. Advantageously, the raised portion 43d further increases the resilience of the bonding material 46 to mechanical stress and thus heating fatigue. The stress may be in a direction different than those protected by raised portion 43b, depending on the orientation of the end portion 43c. Advantageously, the increased area of the lead 43 over the bonding pad 47 increases heat conduction from the top surface of the power device 48, resulting in a cooling of the power device 48.FIG. 5 illustrates a top view of a packaged semiconductor device according to one embodiment. FIG. 5 shows a modification to the lead 43 illustrated in FIG. 3a, FIG. 3b, FIG. 4a, and FIG. 4b. Accordingly, the implementation and variations described in accordance with the embodiments illustrated in FIG. 3a, FIG. 3b, FIG. 4a, and FIG. 4b are applicable to the embodiment illustrated in FIG. 5.In this embodiment, the end portion 43c includes multiple portions, or fingers, that are each curved or provided at any angle relative to the main portion 43a. Each finger is provided with a raised portion 43d, a bonded portion 43e, and a connecting portion 43f, each having characteristics as previously described. The raised portion 43d, bonded portion 43e, and connecting portion 43f for each finger may have identical, similar, or different characteristics. For example, the raised portion 43d of one of the fingers may be positioned above a top surface of the bonding pad 47 at a height equal to a height which the raised portion 43d of another one of the fingers is positioned above the top surface of the bonding pad 47. Alternatively, the raised portion 43d of one of the fingers may be positioned above a top surface of the bonding pad 47 at a height greater than or less than a height which the raised portion 43d of another one of the fingers is positioned above the top surface of the bonding pad 47. In some embodiments, the fingers may have equal lengths and widths, or they may have lengths and widths that are different from each other. In some embodiments, the fingers may be provided at the same angle, or at angles that are, relative to the main portion 43a, different from one another. In one embodiment, as illustrated in FIG. 5, the fingers of the end portion 43c all have the same characteristics. Although two or more fingers can be provided, in this embodiment, three fingers are provided—each at an angle of approximately ninety degrees relative to the main portion 43a. Advantageously, providing multiple fingers facilitates multiple contact points from the lead 43 to the power chip 48. Multiple fingers advantageously increase heat dissipation and increases resilience to mechanical stress and thermal fatigue. The number, size, orientation, and physical properties of the fingers may vary depending on the desired cooling needs and desired resilience to mechanical stress and thermal fatigue.The above description is illustrative but not restrictive. Many variations of the invention will become apparent to those skilled in the art upon review of the disclosure. For example, a single lead 43 may be provided or multiple leads 43 may be provided. If multiple leads 43 are provided, they may all be the same, such as the lead 43 illustrated in FIG. 3a, or they may all be different, such as the lead 43 illustrated in FIG. 3a and the lead 43 illustrated in FIG. 4A and FIG. 5, or some leads may be the same while others are different. The scope of the invention should, therefore, be determined not with reference to the above description, but instead should be determined with reference to the pending claims along with their full scope of equivalents.
& 2004-. All rights reserved.